INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT245
Octal bus transceiver; 3-state
Product specification
File under Integrated Circuits, IC06
September 1993
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
FEATURES
•
Octal bidirectional bus interface
•
Non-inverting 3-state outputs
•
Output capability: bus driver
•
I
CC
category: MSI
GENERAL DESCRIPTIONS
74HC/HCT245
The 74HC/HCT245 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT245 are octal transceivers featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions. The “245” features an output
enable (OE) input for easy cascading and a send/receive
(DIR) for direction control. OE controls the outputs so that
the buses are effectively isolated. The “245” is similar to
the “640” but has true (non-inverting) outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
I
/
O
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay
A
n
to B
n
; B
n
to A
n
input capacitance
input/output capacitance
power dissipation capacitance per transceiver notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
7
3.5
10
30
HCT
10
3.5
10
30
ns
pF
pF
pF
UNIT
September 1993
2
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
PIN DESCRIPTION
PIN NO.
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
SYMBOL
DIR
A
0
to A
7
GND
B
0
to B
7
OE
V
CC
NAME AND FUNCTION
direction control
data inputs/outputs
ground (0 V)
data inputs/outputs
output enable input (active LOW)
positive supply voltage
74HC/HCT245
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
September 1993
3
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
FUNCTION TABLE
INPUTS
OE
L
L
H
Notes
DIR
L
H
X
A
n
74HC/HCT245
INPUTS/OUTPUTS
B
n
inputs
B=A
Z
A=B
inputs
Z
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
September 1993
4
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL
PARAMETER
+25
−40
to
+85
−40
to
+125
max.
135
27
23
225
45
38
225
45
38
90
18
15
ns
74HC/HCT245
TEST CONDITIONS
UNIT V
WAVEFORMS
CC
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.5
min. typ. max. min. max. min.
t
PHL
/ t
PLH
propagation delay
A
n
to B
n;
B
n
to A
n
3-state output enable time
OE to A
n;
OE to B
n
signalname DIR
3-state output disable time
OE to A
n;
OE to B
n
signalname DIR
output transition time
25
9
7
30
11
9
41
15
12
14
5
4
90
18
15
150
30
26
150
30
26
60
12
10
115
23
20
190
38
33
190
38
33
75
15
13
t
PZH
/ t
PZL
ns
Fig.6
t
PHZ
/ t
PLZ
ns
Fig.6
t
THL
/ t
TLH
ns
Fig.5
September 1993
5
实时操作系统RTOS
