INTEGRATED CIRCUITS
DATA SHEET
74HC2G00; 74HCT2G00
Dual 2-input NAND gate
Product specification
Supersedes data of 2002 Jul 10
2003 Feb 12
Philips Semiconductors
Product specification
Dual 2-input NAND gate
FEATURES
•
Wide supply voltage range from 2.0 to 6.0 V
•
Symmetrical output impedance
•
High noise immunity
•
Low power dissipation
•
Balanced propagation delays
•
Very small 8 pins package
•
Output capability is standard
•
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
6.0 ns.
DESCRIPTION
74HC2G00; 74HCT2G00
The 74HC2G/HCT2G00 is a high-speed Si-gate CMOS
device.
The 74HC2G/HCT2G00 provides the 2-input NAND
function.
TYPICAL
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
N = total load switching outputs;
V
CC
= supply voltage in Volts;
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs.
2. For 74HC2G00 the condition is V
I
= GND to V
CC
.
For 74HCT2G00 the condition is V
I
= GND to V
CC
−
1.5 V.
PARAMETER
propagation delay nA, nB to nY
input capacitance
power dissipation capacitance per gate notes 1 and 2
CONDITIONS
HC2G00
C
L
= 50 pF; V
CC
= 4.5 V
9
1.5
10
HCT2G00
12
1.5
10
ns
pF
pF
UNIT
2003 Feb 12
2
Philips Semiconductors
Product specification
Dual 2-input NAND gate
FUNCTION TABLE
See note 1.
INPUT
nA
L
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
74HC2G00DP
74HCT2G00DP
74HC2G00DC
74HCT2G00DC
PINNING
PIN
1
2
3
4
5
6
7
8
1A
1B
2Y
GND
2A
2B
1Y
V
CC
SYMBOL
data input 1A
data input 1B
data output 2Y
ground (0 V)
data input 2A
data input 2B
data output 1Y
supply voltage
TEMPERATURE
RANGE
−40
to +125
°C
−40
to +125
°C
−40
to +125
°C
−40
to +125
°C
PINS
8
8
8
8
nB
L
H
L
H
74HC2G00; 74HCT2G00
OUTPUT
nY
H
H
H
L
PACKAGE MATERIAL
TSSOP8
TSSOP8
VSSOP8
VSSOP8
plastic
plastic
plastic
plastic
CODE
SOT505-2
SOT505-2
SOT765-1
SOT765-1
MARKING
P00
U00
P00
U00
DESCRIPTION
2003 Feb 12
3
Philips Semiconductors
Product specification
Dual 2-input NAND gate
74HC2G00; 74HCT2G00
handbook, halfpage
1A 1
1B 2
8 VCC
7
1Y
2B
2A
handbook, halfpage
1
2
5
6
1A
1B
2A
2B
1Y
7
00
2Y
GND
3
4
MNA711
6
5
2Y
3
MNA712
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1
2
&
7
handbook, halfpage
B
Y
5
6
&
3
A
MNA099
MNA713
Fig.3 IEC logic symbol.
Fig.4 Logic diagram (one driver).
2003 Feb 12
4
Philips Semiconductors
Product specification
Dual 2-input NAND gate
RECOMMENDED OPERATING CONDITIONS
74HC2G00
SYMBOL
V
CC
V
I
V
O
T
amb
PARAMETER
supply voltage
input voltage
output voltage
operating ambient
temperature
input rise and fall times
CONDITIONS
MIN.
2.0
0
0
see DC and AC
−40
characteristics per
device
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
−
−
−
TYP.
5.0
−
−
+25
74HC2G00; 74HCT2G00
74HCT2G00
UNIT
MIN.
4.5
0
0
−40
TYP.
5.0
−
−
+25
MAX.
5.5
V
CC
V
CC
+125
V
V
V
°C
MAX.
6.0
V
CC
V
CC
+125
t
r
, t
f
−
6.0
−
1000
500
400
−
−
−
−
6.0
−
−
500
−
ns
ns
ns
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
I
IK
I
OK
I
O
I
CC
T
stg
P
D
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 110
°C
the value of P
D
derates linearly with 8 mW/K.
PARAMETER
supply voltage
input diode current
output diode current
output source or sink current
V
CC
or GND current
storage temperature
power dissipation per package
for temperature range from
−40
to +125
°C;
note 2
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V; note 1
V
O
<
−0.5
V or V
O
> V
CC
+ 0.5 V; note 1
−0.5
V < V
O
< V
CC
+ 0.5 V; note 1
note 1
CONDITIONS
MIN.
−0.5
−
−
−
−
−65
−
MAX.
+7.0
±20
±20
25
50
+150
300
UNIT
V
mA
mA
mA
mA
°C
mW
2003 Feb 12
5
嵌入式系统
