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74LCX16373MTD

Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs, 3800-TUBE

器件类别:逻辑    逻辑   

厂商名称:Digitron

厂商官网:http://www.digitroncorp.com

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器件参数
参数名称
属性值
Brand Name
ON Semiconductor
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Digitron
包装说明
TSSOP-48
制造商包装代码
948BQ
Reach Compliance Code
compliant
ECCN代码
EAR99
Factory Lead Time
9 weeks
Samacsys Confidence
Samacsys Status
Released
Samacsys PartID
438072
Samacsys Pin Count
48
Samacsys Part Category
Undefined or Miscellaneous
Samacsys Package Category
Other
Samacsys Footprint Name
SOP50P810X120-48N
Samacsys Released Date
2017-01-11 16:35:06
Is Samacsys
N
系列
LVC/LCX/Z
JESD-30 代码
R-PDSO-G48
JESD-609代码
e4
长度
12.5 mm
负载电容(CL)
50 pF
逻辑集成电路类型
BUS DRIVER
最大I(ol)
0.024 A
湿度敏感等级
2
位数
8
功能数量
2
端口数量
2
端子数量
48
最高工作温度
85 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
TSSOP
封装等效代码
TSSOP48,.3,20
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法
RAIL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3.3 V
Prop。Delay @ Nom-Sup
5.4 ns
传播延迟(tpd)
6.6 ns
认证状态
Not Qualified
座面最大高度
1.2 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2 V
标称供电电压 (Vsup)
2.5 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式
GULL WING
端子节距
0.5 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
6.1 mm
Base Number Matches
1
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Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers
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74LCX16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs
February 1994
Revised May 2005
74LCX16373
Low Voltage 16-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs
General Description
The LCX16373 contains sixteen non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCX16373 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16373 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
5.4 ns t
PD
max (V
CC
3.3V), 20
P
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
r
24 mA output drive (V
CC
3.0V)
s
Uses proprietary noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX16373G
(Note 2)(Note 3)
74LCX16373MEA
(Note 3)
74LCX16373MTD
(Note 3)
Package Number
BGA54A
MS48A
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 2:
Ordering code “G” indicates Trays.
Note 3:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation
DS012002
www.fairchildsemi.com
74LCX16373
Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Descriptions
Pin Names
OE
n
LE
n
I
0
–I
15
O
0
–O
15
NC
Description
Output Enable Input (Active LOW)
Latch Enable Input
Inputs
Outputs
No Connect
FBGA Pin Assignments
1
A
B
C
D
E
F
G
H
J
O
0
O
2
O
4
O
6
O
8
O
10
O
12
O
14
O
15
2
NC
O
1
O
3
O
5
O
7
O
9
O
11
O
13
NC
3
OE
1
NC
V
CC
GND
GND
GND
V
CC
NC
OE
2
4
LE
1
NC
V
CC
GND
GND
GND
V
CC
NC
LE
2
5
NC
I
1
I
3
I
5
I
7
I
9
I
11
I
13
NC
6
I
0
I
2
I
4
I
6
I
8
I
10
I
12
I
14
I
15
Truth Tables
Inputs
LE
1
X
Pin Assignment for FBGA
H
H
L
OE
1
H
L
L
L
Inputs
LE
2
X
H
H
L
(Top Thru View)
H
L
X
Z
O
0
Outputs
I
0
–I
7
X
L
H
X
O
0
–O
7
Z
L
H
O
0
Outputs
I
8
–I
15
X
L
H
X
O
8
–O
15
Z
L
H
O
0
OE
2
H
L
L
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
Previous O
0
before HIGH-to-LOW transition of Latch Enable
www.fairchildsemi.com
2
74LCX16373
Functional Description
The LCX16373 contains sixteen D-type latches with
3-STATE standard outputs. The device is byte controlled
with each byte functioning identically, but independent of
the other. Control pins can be shorted together to obtain full
16-bit operation. The following description applies to each
byte. When the Latch Enable (LE
n
) input is HIGH, data on
the I
n
enters the latches. In this condition the latches are
transparent, i.e. a latch output will change state each time
its I input changes. When LE
n
is LOW, the latches store
information that was present on the I inputs a setup time
preceding the HIGH-to-LOW transition of LE
n
. The
3-STATE standard outputs are controlled by the Output
Enable (OE
n
) input. When OE
n
is LOW, the standard out-
puts are in the 2-state mode. When OE
n
is HIGH, the stan-
dard outputs are in the high impedance mode but this does
not interfere with entering new data into the latches.
Logic Diagrams
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
www.fairchildsemi.com
74LCX16373
Absolute Maximum Ratings
(Note 4)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 5)
V
I

GND
V
O

GND
V
O
!
V
CC
V
mA
mA
mA
mA
mA

0.5 to

7.0

0.5 to

7.0

0.5 to

7.0

0.5 to V
CC

0.5

50

50

50
r
50
r
100
r
100

65 to

150
q
C
Recommended Operating Conditions
(Note 6)
Symbol
V
CC
V
I
V
O
I
OH
/I
OL
Supply Voltage
Input Voltage
Output Voltage
Output Current
HIGH or LOW State
3-STATE
V
CC
V
CC
V
CC
T
A
Free-Air Operating Temperature
Input Edge Rate, V
IN
0.8V–2.0V, V
CC
3.0V
3.0V

3.6V
2.7V

3.0V
2.3V

2.7V
Parameter
Operating
Data Retention
Min
2.0
1.5
0
0
0
Max
3.6
3.6
5.5
V
CC
5.5
Units
V
V
V
r
24
r
12
r
8

40
0
85
10
mA
q
C
ns/V
'
t/
'
V
Note 4:
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 5:
I
O
Absolute Maximum Rating must be observed.
Note 6:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
I
OH
I
OH
I
OH
I
OH
V
OL
LOW Level Output Voltage
I
OL
I
OL
I
OL
I
OL
I
OL
I
I
I
OZ
I
OFF
Input Leakage Current
3-STATE Output Leakage
Power-Off Leakage Current
Conditions
V
CC
(V)
2.3

2.7
2.7

3.6
2.3

2.7
2.7

3.6
T
A

40
q
C to

85
q
C
Max
Min
1.7
2.0
Units
V
0.7
0.8
V
CC

0.2
1.8
2.2
2.4
2.2
0.2
0.6
0.4
0.4
0.55
V

100
P
A
8 mA
2.3

3.6
2.3
2.7
3.0
3.0
2.3

3.6
2.3
2.7
3.0
3.0
2.3

3.6
2.3

3.6
0

12 mA

18 mA

24 mA
100
P
A
8 mA
12 mA
16 mA
24 mA
V
V
0
d
V
I
d
5.5V
0
d
V
O
d
5.5V
V
I
V
IH
or V
IL
5.5V
V
I
or V
O
r
5.0
r
5.0
10
P
A
P
A
P
A
www.fairchildsemi.com
4
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