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74LCX374CW

Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS

器件类别:逻辑   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

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器件参数
参数名称
属性值
厂商名称
Fairchild
包装说明
DIE,
Reach Compliance Code
unknown
系列
LVC/LCX/Z
JESD-30 代码
X-XUUC-N20
逻辑集成电路类型
BUS DRIVER
位数
8
功能数量
1
端口数量
2
端子数量
20
最高工作温度
85 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
UNSPECIFIED
封装代码
DIE
封装形状
UNSPECIFIED
封装形式
UNCASED CHIP
传播延迟(tpd)
10.5 ns
认证状态
Not Qualified
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
NO LEAD
端子位置
UPPER
Base Number Matches
1
文档预览
74LCX374 Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
February 1994
Revised April 1999
74LCX374
Low Voltage Octal D-Type Flip-Flop with 5V Tolerant
Inputs and Outputs
General Description
The LCX374 consists of eight D-type flip-flops featuring
separate D-type inputs for each flip-flop and 3-STATE out-
puts for bus-oriented applications. A buffered clock (CP)
and Output Enable (OE) are common to all flip-flops. The
LCX374 is designed for low-voltage (3.3V or 2.5V) V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX374 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
8.5 ns t
PD
max (V
CC
=
3.3V), 10
µA
I
CC
max
s
Power-down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
±24
mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human Body Model
>
2000V
Machine Model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX374WM
74LCX374SJ
74LCX374MSA
74LCX374MTC
Package Number
M20B
M20D
MSA20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
D
0
–D
7
CP
OE
O
0
–O
7
Description
Data Inputs
Clock Pulse Input
Output Enable Input
3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation
DS011996.prf
www.fairchildsemi.com
74LCX374
Functional Description
The LCX374 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Truth Table
Inputs
D
n
H
L
X
X
CP
Outputs
OE
L
L
L
H
O
n
H
L
O
0
Z


L
X
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
=
LOW-to-HIGH Transition
O
0
=
Previous O
0
before HIGH-to-LOW of CP

Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74LCX374
Absolute Maximum Ratings
(Note 2)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
−0.5
to
+7.0
−0.5
to
+7.0
−0.5
to
+7.0
−0.5
to V
CC
+
0.5
−50
−50
+50
±50
±100
±100
−65
to
+150
(Note 4)
Min
Operating
Data Retention
V
I
V
O
I
OH
/I
OL
Input Voltage
Output Voltage
Output Current
HIGH or LOW State
3-STATE
V
CC
=
3.0V
3.6V
V
CC
=
2.7V
3.0V
V
CC
=
2.3V
2.7V
T
A
∆t/∆V
Free-Air Operating Temperature
Input Edge Rate, V
IN
=
0.8V
2.0V, V
CC
=
3.0V
−40
0
2.0
1.5
0
0
0
Max
3.6
3.6
5.5
V
CC
5.5
±24
±12
±8
85
10
°C
ns/V
mA
Units
V
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 3)
V
I
<
GND
V
O
<
GND
V
O
>
V
CC
Conditions
Units
V
V
V
mA
mA
mA
mA
mA
°C
Recommended Operating Conditions
Symbol
V
CC
Supply Voltage
Parameter
Note 2:
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 3:
I
O
Absolute Maximum Rating must be observed.
Note 4:
Unused inputs or I/Os must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
= −100 µA
I
OH
= −8
mA
I
OH
= −12
mA
I
OH
= −18
mA
I
OH
= −24
mA
V
OL
LOW Level Output Voltage
I
OL
=
100
µA
I
OL
=
8 mA
I
OL
=
12 mA
I
OL
=
16 mA
I
OL
=
24 mA
I
I
I
OZ
I
OFF
Input Leakage Current
3-STATE Output Leakage
Power-Off Leakage Current
0
V
I
5.5V
0
V
O
5.5V
V
I
=
V
IH
or V
IL
V
I
or V
O
=
5.5V
0
10
Conditions
V
CC
(V)
2.3
2.7
2.7
3.6
2.3
2.7
2.7
3.6
2.3
3.6
2.3
2.7
3.0
3.0
2.3
3.6
2.3
2.7
3.0
3.0
2.3
3.6
2.3
3.6
V
CC
0.2
1.8
2.2
2.4
2.2
0.2
0.6
0.4
0.4
0.55
±5.0
±5.0
µA
µA
µA
V
V
T
A
= −40°C
to
+85°C
Min
1.7
2.0
0.7
0.8
Max
V
V
Units
3
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74LCX374
DC Electrical Characteristics
Symbol
I
CC
∆I
CC
Parameter
Quiescent Supply Current
Increase in I
CC
per Input
(Continued)
V
CC
(V)
2.3
3.6
2.3
3.6
2.3
3.6
T
A
= −40°C
to
+85°C
Min
Max
10
±10
500
µA
µA
Conditions
V
I
=
V
CC
or GND
3.6V
V
I
, V
O
5.5V (Note 5)
V
IH
=
V
CC
0.6V
Units
Note 5:
Outputs disabled or 3-STATE only.
AC Electrical Characteristics
T
A
= −40°C
to
+85°C,
R
L
=
500
Symbol
Parameter
V
CC
=
3.3V
±
0.3V
C
L
=
50 pF
Min
f
MAX
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
t
S
t
H
t
W
t
OSHL
t
OSLH
Setup Time
Hold Time
Pulse Width
Output to Output Skew (Note 6)
Output Disable Time
Maximum Clock Frequency
Propagation Delay
CP to O
n
Output Enable Time
150
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.3
1.0
1.0
8.5
8.5
8.5
8.5
7.5
7.5
Max
V
CC
=
2.7V
C
L
=
50 pF
Min
150
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.3
9.5
9.5
9.5
9.5
8.5
8.5
Max
V
CC
=
2.5
±
0.2
C
L
=
30 pF
Min
150
1.5
1.5
1.5
1.5
1.5
1.5
4.0
2.0
4.0
10.5
10.5
10.5
10.5
9.0
9.0
Max
MHz
ns
ns
ns
ns
ns
ns
ns
Units
Note 6:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Dynamic Switching Characteristics
Symbol
V
OLP
V
OLV
Parameter
Quiet Output Dynamic Peak V
OL
Quiet Output Dynamic Valley V
OL
Conditions
C
L
=
50 pF, V
IH
=
3.3V, V
IL
=
0V
C
L
=
30 pF, V
IH
=
2.5V, V
IL
=
0V
C
L
=
50 pF, V
IH
=
3.3V, V
IL
=
0V
C
L
=
30 pF, V
IH
=
2.5V, V
IL
=
0V
V
CC
(V)
3.3
2.5
3.3
2.5
T
A
=
25°C
Typical
0.8
0.6
−0.8
−0.6
V
V
Units
Capacitance
Symbol
C
IN
C
OUT
C
PD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Conditions
V
CC
=
Open, V
I
=
0V or V
CC
V
CC
=
3.3V, V
I
=
0V or V
CC
V
CC
=
3.3V, V
I
=
0V or V
CC
, f
=
10 MHz
Typical
7
8
25
Units
pF
pF
pF
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4
74LCX374
AC LOADING and WAVEFORMS
Generic for LCX Family
FIGURE 1. AC Test Circuit (C
L
includes probe and jig capacitance)
Test
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
,t
PHZ
Switch
Open
6V at V
CC
=
3.3
±
0.3V
V
CC
x 2 at V
CC
=
2.5
±
0.2V
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output High Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and t
rec
Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, t
R
= t
F
= 3ns)
Symbol
V
mi
V
mo
V
x
V
y
V
CC
3.3V
±
0.3V
1.5V
1.5V
V
OL
+
0.3V
V
OH
0.3V
2.7V
1.5V
1.5V
V
OL
+
0.3V
V
OH
0.3V
t
rise
and t
fall
2.5V
±
0.2V
V
CC
/2
V
CC
/2
V
OL
+
0.15V
V
OH
0.15V
5
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