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74LCX646

Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs

厂商名称:Fairchild

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74LCX646 Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs
February 1994
Revised March 2001
74LCX646
Low Voltage Octal Transceiver/Register
with 5V Tolerant Inputs and Outputs
General Description
The LCX646 consists of registered bus transceiver circuits,
D-type flip-flops, and control circuitry providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Data on the A or B bus will be
loaded into the respective registers on the LOW-to-HIGH
transition of the appropriate pin (CPAB or CPBA) (see
Functional Description).
The LCX646 is designed for low voltage (2.5V or 3.3V) V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX646 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V
3.6V V
CC
specifications provided
s
7.0 ns t
PD
max (V
CC
=
3.3V), 10
µ
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
±
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX646WM
74LCX646MSA
74LCX646MTC
Package Number
M24B
MSA24
MTC24
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A
0
–A
7
Description
Data Register A Inputs
Data Register A Outputs
B
0
–B
7
Data Register B Inputs
Data Register B Outputs
CPAB, CPBA
SAB, SBA
OE
DIR
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
© 2001 Fairchild Semiconductor Corporation
DS011997
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74LCX646
Logic Symbols
IEEE/IEC
Truth Table
(Note 2)
Inputs
OE
H
H
H
L
L
L
L
L
L
L
L
DIR
X
X
X
H
H
H
H
L
L
L
L
CPAB CPBA SAB
H or L H or L
SBA
X
X
X
X
X
X
X
L
L
H
H
Output
Input
Input
Input
Input
Data I/O
Function
A
0
–A
7
B
0
–B
7
Isolation
Clock A
n
Data into A Register
Clock B
n
Data into B Register
A
n
to B
n
—Real Time (Transparent Mode)
Output Clock A
n
Data into A Register
A Register to B
n
(Stored Mode)
Clock A
n
Data into A Register and Output to B
n
B
n
to A
n
—Real Time (Transparent Mode)
Clock B
n
Data into B Register
B Register to A
n
(Stored Mode)
Clock B
n
Data into B Register and Output to A
n

X
X
X
X
L
L
H
H
X
X
X
X

X
X
X
X
X
H or L


X
X
X
X
X
H or L
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition


X

Note 2:
The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.
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2
74LCX646
Functional Description
In the transceiver mode, data present at the HIGH imped-
ance port may be stored in either the A or B register or
both. The select (SAB, SBA) controls can multiplex stored
and real-time. The examples shown below demonstrate the
four fundamental bus-management functions that can be
performed.
The direction control (DIR) determines which bus will
receive data when OE is LOW. In the isolation mode (OE
HIGH), A data may be stored in one register and/or B data
may be stored in the other register. When an output func-
tion is disabled, the input function is still enabled and may
be used to store and transmit data. Only one of the two
busses, A or B, may be driven at a time.
Real-Time Transfer
Bus B to Bus A
Real-Time Transfer
Bus A to Bus B
OE DIR CPAB CPBA SAB SBA
L
L
X
X
X
L
OE
L
DIR
H
CPAB CPBA
X
X
SAB
L
SBA
X
Transfer Storage
Data to A or B
Storage
OE
L
L
DIR
L
H
CPAB CPBA
X
H or L
H or L
X
SAB
X
H
SBA
H
X
OE
L
L
H
H
DIR
H
L
X
X
CPAB CPBA
X
X
X
X




SAB
L
X
X
X
SBA
X
L
X
X
3
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74LCX646
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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4
74LCX646
Absolute Maximum Ratings
(Note 3)
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
Value
Conditions
Units
V
V
Output in 3-STATE
Output in HIGH or LOW State (Note 4)
V
I
<
GND
V
O
<
GND
V
O
>
V
CC
V
mA
mA
mA
mA
mA
0.5 to
+
7.0
0.5 to
+
7.0
0.5 to
+
7.0
0.5 to V
CC
+
0.5
50
50
+
50
±
50
±
100
±
100
65 to
+
150
°
C
Recommended Operating Conditions
(Note 5)
Symbol
V
CC
V
I
V
O
I
OH
/I
OL
Supply Voltage
Input Voltage
Output Voltage
Output Current
HIGH or LOW State
3-STATE
V
CC
=
3.0V
3.6V
V
CC
=
2.7V
3.0V
V
CC
=
2.3V
2.7V
T
A
Free-Air Operating Temperature
Input Edge Rate, V
IN
=
0.8V
2.0V, V
CC
=
3.0V
Parameter
Operating
Data Retention
Min
2.0
1.5
0
0
0
Max
3.6
3.6
5.5
V
CC
5.5
Units
V
V
V
±
24
±
12
±
8
40
0
85
10
mA
°
C
ns/V
t/
V
Note 3:
The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 4:
I
O
Absolute Maximum Rating must be observed.
Note 5:
Unused inputs or I/Os must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
= −100 µA
I
OH
= −8
mA
I
OH
= −12
mA
I
OH
= −18
mA
I
OH
= −24
mA
V
OL
LOW Level Output Voltage
I
OL
=
100
µA
I
OL
=
8 mA
I
OL
=
12 mA
I
OL
=
16 mA
I
OL
=
24 mA
I
I
I
OZ
I
OFF
Input Leakage Current
3-STATE I/O Leakage
Power-Off Leakage Current
0
V
I
5.5V
0
V
O
5.5V
V
I
=
V
IH
or V
IL
V
I
or V
O
=
5.5V
Conditions
V
CC
(V)
2.3
2.7
2.7
3.6
2.3
2.7
2.7
3.6
2.3
3.6
2.3
2.7
3.0
3.0
2.3
3.6
2.3
2.7
3.0
3.0
2.3
3.6
2.3
3.6
0
V
CC
0.2
1.8
2.2
2.4
2.2
0.2
0.6
0.4
0.4
0.55
±5.0
±5.0
10
µA
µA
µA
V
V
T
A
= −40°C
to
+85°C
Min
1.7
2.0
0.7
0.8
Max
Units
V
V
5
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参数对比
与74LCX646相近的元器件有:74LCX646WMX、74LCX646MSA、74LCX646MTC。描述及对比如下:
型号 74LCX646 74LCX646WMX 74LCX646MSA 74LCX646MTC
描述 Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs
是否Rohs认证 - 符合 符合 符合
厂商名称 - Fairchild Fairchild Fairchild
零件包装代码 - SOIC SSOP TSSOP
包装说明 - SOP, SOP24,.4 SSOP, SSOP24,.3 TSSOP, TSSOP24,.25
针数 - 24 24 24
Reach Compliance Code - compli compliant compliant
其他特性 - WITH DIRECTION CONTROL WITH DIRECTION CONTROL WITH DIRECTION CONTROL
控制类型 - INDEPENDENT CONTROL INDEPENDENT CONTROL INDEPENDENT CONTROL
计数方向 - BIDIRECTIONAL BIDIRECTIONAL BIDIRECTIONAL
系列 - LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 代码 - R-PDSO-G24 R-PDSO-G24 R-PDSO-G24
JESD-609代码 - e3 e3 e4
长度 - 15.4 mm 8.2 mm 7.8 mm
负载电容(CL) - 50 pF 50 pF 50 pF
逻辑集成电路类型 - REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
最大I(ol) - 0.024 A 0.024 A 0.024 A
湿度敏感等级 - 1 1 1
位数 - 8 8 8
功能数量 - 1 1 1
端口数量 - 2 2 2
端子数量 - 24 24 24
最高工作温度 - 85 °C 85 °C 85 °C
最低工作温度 - -40 °C -40 °C -40 °C
输出特性 - 3-STATE 3-STATE 3-STATE
输出极性 - TRUE TRUE TRUE
封装主体材料 - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 - SOP SSOP TSSOP
封装等效代码 - SOP24,.4 SSOP24,.3 TSSOP24,.25
封装形状 - RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 - SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法 - TAPE AND REEL RAIL RAIL
峰值回流温度(摄氏度) - 260 260 260
电源 - 3.3 V 3.3 V 3.3 V
传播延迟(tpd) - 10.5 ns 10.5 ns 10.5 ns
认证状态 - Not Qualified Not Qualified Not Qualified
座面最大高度 - 2.65 mm 2.05 mm 1.2 mm
最大供电电压 (Vsup) - 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) - 2 V 2 V 2 V
标称供电电压 (Vsup) - 2.5 V 2.5 V 2.5 V
表面贴装 - YES YES YES
技术 - CMOS CMOS CMOS
温度等级 - INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 - Matte Tin (Sn) Matte Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式 - GULL WING GULL WING GULL WING
端子节距 - 1.27 mm 0.65 mm 0.65 mm
端子位置 - DUAL DUAL DUAL
处于峰值回流温度下的最长时间 - NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
翻译 - N/A N/A N/A
触发器类型 - POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
宽度 - 7.5 mm 5.3 mm 4.4 mm
Base Number Matches - 1 1 1
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