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7HCPL-5230-200

Hermetically Sealed, Low IF, Wide VCC, Logic Gate Optocouplers

厂商名称:HP(Keysight)

厂商官网:http://www.semiconductor.agilent.com/

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Hermetically Sealed,
Low I
F
, Wide V
CC
,
Logic Gate Optocouplers
Technical Data
HCPL-520x*
5962-88768
HCPL-523x
HCPL-623x
HCPL-625x
5962-88769
*See matrix for available extensions.
Features
• Dual Marked with Device
Part Number and DSCC
Standard Microcircuit
Drawing
• Manufactured and Tested on
a MIL-PRF-38534 Certified
Line
• QML-38534, Class H and K
• Four Hermetically Sealed
Package Configurations
• Performance Guaranteed
over -55
°
C to +125
°
C
• Wide V
CC
Range (4.5 to 20 V)
• 350 ns Maximum Propaga-
tion Delay
• CMR: > 10,000 V/
µ
s Typical
• 1500 Vdc Withstand Test
Voltage
• Three State Output Available
• High Radiation Immunity
• HCPL-2200/31 Function
Compatibility
• Reliability Data Available
• Compatible with LSTTL,
TTL, and CMOS Logic
• Isolated Bus Driver (Single
Channel)
• Pulse Transformer
Replacement
• Ground Loop Elimination
• Harsh Industrial
Environments
• Computer-Peripheral
Interfaces
eliminates the potential for
output signal chatter. The
detector in the single channel
units has a tri-state output stage
Truth Tables
(Positive Logic)
Multichannel Devices
Input
Output
On (H)
H
Off (L)
L
Description
These units are single, dual and
quad channel, hermetically sealed
optocouplers. The products are
capable of operation and storage
over the full military temperature
range and can be purchased as
either standard product or with
full MIL-PRF-38534 Class Level
H or K testing or from the
appropriate DSCC Drawing. All
devices are manufactured and
tested on a MIL-PRF-38534
certified line and are included in
the DSCC Qualified Manufac-
turers List QML-38534 for Hybrid
Microcircuits.
Each channel contains an AlGaAs
light emitting diode which is
optically coupled to an integrated
high gain photon detector. The
detector has a threshold with
hysteresis which provides differ-
ential mode noise immunity and
Single Channel DIP
Input
Enable
On (H)
H
Off (L)
H
On (H)
L
Off (L)
L
Output
Z
Z
H
L
Functional Diagram
Multiple Channel Devices
Available
V
CC
V
O
Applications
• Military and Space
• High Reliability Systems
• Transportation and Life
Critical Systems
• High Speed Line Receiver
V
E
GND
A 0.1
µF
bypass capacitor must be connected between V
CC
and GND pins.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
2
which allows for direct connection
to data buses. The output is non-
inverting. The detector IC has an
internal shield that provides a
guaranteed common mode
transient immunity of up to
10,000 V/µs. Improved power
supply rejection eliminates the
need for special power supply
bypass precautions.
Package styles for these parts are
8 pin DIP through hole (case
outline P), 16 pin DIP flat pack
(case outline F), and leadless
ceramic chip carrier (case outline
2). Devices may be purchased
with a variety of lead bend and
plating options, see Selection
Guide Table for details. Standard
Microcircuit Drawing (SMD)
parts are available for each
package and lead style.
Because the same electrical die
(emitters and detectors) are used
for each channel of each device
listed in this data sheet, absolute
maximum ratings, recommended
operating conditions, electrical
specifications, and performance
characteristics shown in the
figures are identical for all parts.
Occasional exceptions exist due
to package variations and limita-
tions and are as noted. Addition-
ally, the same package assembly
processes and materials are used
in all devices. These similarities
give justification for the use of
data obtained from one part to
represent other part’s per-
formance for die related
reliability and certain limited
radiation test results.
Selection Guide–Package Styles and Lead Configuration Options
Package
Lead Style
Channels
Common Channel
Wiring
Agilent Part # & Options
Commercial
MIL-PRF-38534, Class H
MIL-PRF-38534, Class K
Standard Lead Finish
Solder Dipped
Butt Cut/Gold Plate
Gull Wing/Soldered
Class H SMD Part #
Prescript for all below
Either Gold or Solder
Gold Plate
Solder Dipped
Butt Cut/Gold Plate
Butt Cut/Soldered
Gull Wing/Soldered
Class K SMD Part #
Prescript for all below
Either Gold or Solder
Gold Plate
Solder Dipped
Butt Cut/Gold Plate
Butt Cut/Soldered
Gull Wing/Soldered
8 Pin DIP
Through Hole
1
None
8 Pin DIP
Through Hole
2
V
CC
, GND
16 Pin Flat Pack
Unformed Leads
4
V
CC
, GND
20 Pad LCCC
Surface Mount
2
None
HCPL-5200
HCPL-5201
HCPL-520K
Gold Plate
Option #200
Option #100
Option #300
5962-
8876801PX
8876801PC
8876801PA
8876801YC
8876801YA
8876801XA
5962-
8876802KPX
8876802KPC
8876802KPA
8876802KYC
8876802KYA
8876802KXA
HCPL-5230
HCPL-5231
HCPL-523K
Gold Plate
Option #200
Option #100
Option #300
5962-
8876901PX
8876901PC
8876901PA
8876901YC
8876901YA
8876901XA
5962-
8876904KPX
8876904KPC
8876904KPA
8876904KYC
8876904KYA
8876904KXA
HCPL-6250
HCPL-6251
HCPL-625K
Gold Plate
HCPL-6230
HCPL-6231
HCPL-623K
Soldered Pads
5962-
8876903FX
8876903FC
5962-
88769022X
88769022A
5962-
8876906KFX
8876906KFC
5962-
8876905K2X
8876905K2A
3
Functional Diagrams
8 Pin DIP
Through Hole
1 Channel
8 Pin DIP
Through Hole
2 Channels
16 Pin Flat Pack
Unformed Leads
4 Channels
1
16
V
CC
15
V
O1
14
V
O2
13
V
O3
12
V
O4
11
GND 10
9
20 Pad LCCC
Surface Mount
2 Channels
15
V
CC2
19
20
V
O2
GND
2
V
O1
GND
1
7
8
V
CC1
13
12
1
2
3
4
V
CC
V
O
8
7
6
5
1
2
3
4
V
CC
V
O1
8
7
2
3
4
V
O2
V
E
GND
6
5
5
6
7
8
2
3
10
GND
Note:
Multichannel DIP and flat pack devices have common V
CC
and ground. Single channel DIP has an enable pin 6. LCCC (leadless
ceramic chip carrier) package has isolated channels with separate V
CC
and ground connections.
Outline Drawings
16 Pin Flat Pack, 4 Channels
7.24 (0.285)
6.99 (0.275)
2.29 (0.090)
MAX.
1.27 (0.050)
REF.
11.13 (0.438)
10.72 (0.422)
0.46 (0.018)
0.36 (0.014)
8.13 (0.320)
MAX.
2.85 (0.112)
MAX.
0.88 (0.0345)
MIN.
0.89 (0.035)
0.69 (0.027)
5.23
(0.206)
MAX.
9.02 (0.355)
8.76 (0.345)
0.31 (0.012)
0.23 (0.009)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
20 Terminal LCCC Surface Mount, 2 Channels
8.70 (0.342)
9.10 (0.358)
4.95 (0.195)
5.21 (0.205)
1.78 (0.070)
2.03 (0.080)
1.02 (0.040) (3 PLCS)
1.14 (0.045)
1.40 (0.055)
8.70 (0.342)
9.10 (0.358)
4.95 (0.195)
5.21 (0.205)
1.78 (0.070)
2.03 (0.080)
0.64
(0.025)
(20 PLCS)
1.52 (0.060)
2.03 (0.080)
8 Pin DIP Through Hole, 1 and 2 Channel
9.40 (0.370)
9.91 (0.390)
0.76 (0.030)
1.27 (0.050)
4.32 (0.170)
MAX.
8.13 (0.320)
MAX.
7.16 (0.282)
7.57 (0.298)
TERMINAL 1 IDENTIFIER
2.16 (0.085)
METALIZED
CASTILLATIONS (20 PLCS)
0.51 (0.020)
0.51 (0.020)
MIN.
3.81 (0.150)
MIN.
0.20 (0.008)
0.33 (0.013)
2.29 (0.090)
2.79 (0.110)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
SOLDER THICKNESS 0.127 (0.005) MAX.
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
7.36 (0.290)
7.87 (0.310)
4
Leaded Device Marking
Agilent LOGO
Agilent P/N
DSCC SMD*
DSCC SMD*
PIN ONE/
ESD IDENT
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
50434
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
COUNTRY OF MFR.
Agilent FSCN*
Leadless Device Marking
Agilent LOGO
Agilent P/N
PIN ONE/
ESD IDENT
COUNTRY OF MFR.
A QYYWWZ
XXXXXX
XXXX
XXXXXX
XXX 50434
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
DSCC SMD*
DSCC SMD*
Agilent FSCN*
*QUALIFIED PARTS ONLY
*QUALIFIED PARTS ONLY
Hermetic Optocoupler Options
Option
100
Description
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This
option is available on commercial and hi-rel product in 8 pin DIP (see drawings below for
details).
4.32 (0.170)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
1.14 (0.045)
1.40 (0.055)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
200
300
Lead finish is solder dipped rather than gold plated. This option is available on commercial
and hi-rel product in 8 pin DIP. DSCC Drawing part numbers contain provisions for lead
finish. All leadless chip carrier devices are delivered with solder dipped terminals as a
standard feature.
Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This
option is available on commercial and hi-rel product in 8 pin DIP (see drawings below for
details). This option has solder dipped leads.
4.57 (0.180)
MAX.
0.20 (0.008)
0.33 (0.013)
9.65 (0.380)
9.91 (0.390)
4.57 (0.180)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
1.40 (0.055)
1.65 (0.065)
0.51 (0.020)
MAX.
5° MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
5
Absolute Maximum Ratings
Storage Temperature Range, T
S
.................................. -65°C to +150°C
Operating Temperature, T
A
......................................... -55°C to +125°C
Case Temperature, T
C
................................................................ +170°C
Junction Temperature, T
J
.......................................................... +175°C
Lead Solder Temperature .............................................. 260°C for 10 s
Average Forward Curre, I
F AVG
(each channel) ............................. 8 mA
Peak Input Current, I
F PK
(each channel) ............................... 20 mA
[1]
Reverse Input Voltage, V
R
(each channel) ....................................... 3 V
Supply Voltage ,V
CC
.............................................. 0.0 V min., 20 V max.
Average Output Current, I
O
(each channel) ................................. 15 mA
Output Voltage, V
O
(each channel) .................... –0.3 V min., 20 V max.
Package Power Dissipation, P
d
(each channel) ......................... 200 mW
Single Channel Product Only
Tri-State Enable Voltage, V
E
............................... –0.3 V min., 20 V max.
8 Pin Ceramic DIP Single Channel Schematic
ANODE
CATHODE
Note enable pin 6. An external 0.01
µF
to 0.1
µF
bypass capacitor is recommended
between V
CC
and ground for each package type.
ESD Classification
(MIL-STD-883, Method 3015)
HCPL-5200/01/0K, HCPL-6230/31/3K ................................ (∆), Class 1
HCPL-5230/31/3K, HCPL-6250/51/5K ............................ (Dot), Class 3
Recommended Operating Conditions
Parameter
Power Supply Voltage
Input Current, High Level,
Each Channel
Input Voltage, Low Level,
Each Channel
Fan Out (TTL Load)
Each Channel
Symbol
V
CC
I
FH
V
FL
N
Min.
4.5
2
0
Max.
20
8
0.8
4
Units
V
mA
V
Single Channel Product Only
High Level Enable Voltage
V
EH
Low Level Enable Voltage
V
EL
2.0
0
20
0.8
V
V
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