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7P001FLG0600I15

Flash Card, 512MX16, 150ns, CARD-68

器件类别:存储    存储   

厂商名称:White Electronic Designs Corporation

厂商官网:http://www.wedc.com/

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器件参数
参数名称
属性值
厂商名称
White Electronic Designs Corporation
包装说明
CARD-68
Reach Compliance Code
unknown
ECCN代码
EAR99
最长访问时间
150 ns
备用内存宽度
8
JESD-30 代码
R-XXMA-X68
内存密度
8589934592 bit
内存集成电路类型
FLASH CARD
内存宽度
16
功能数量
1
端子数量
68
字数
536870912 words
字数代码
512000000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
512MX16
封装主体材料
UNSPECIFIED
封装形状
RECTANGULAR
封装形式
MICROELECTRONIC ASSEMBLY
并行/串行
PARALLEL
编程电压
12 V
认证状态
Not Qualified
最大供电电压 (Vsup)
5.25 V
最小供电电压 (Vsup)
4.75 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
CMOS
温度等级
INDUSTRIAL
端子形式
UNSPECIFIED
端子位置
UNSPECIFIED
类型
NOR TYPE
文档预览
White Electronic Designs
PCMCIA Flash Memory Card
FLG Series
PCMCIA Flash Memory Card - 256 KILOBYTE through
5 MEGABYTE (Intel/Catalyst based)
GENERAL DESCRIPTION
WEDC’s FLG Series Flash memory cards offer low/medium
density linear Flash solid state storage solutions for code
and data storage, high performance disk emulation and
execute in place (XIP) applications in mobile PC and
dedicated (embedded) equipment.
FLG series cards conform to PCMCIA international
standard.
The card’s control logic provides the system interface
and controls the internal Flash memories. Card can be
read/written in byte-wide or word-wide mode which allows
for flexible integration into various systems. Combined
with file management software, such as Flash Translation
Layer (FTL), FLG Flash cards provide removable high-
performance disk emulation.
The FLG series cards contain separate 2kB EEPROM
memory for Card Information Structure (CIS) which can be
used for easy identification of card characteristics.
The WEDC FLG series is based on Intel/Catalyst 28F010
or 28F020 Flash memories.
Note: Standard options include attribute memory. Cards
without attribute memory are available. Cards are also
available with or without a hardware write protect switch.
ARCHITECTURE OVERVIEW
WEDC’s FLG series is designed to support from 2 to
20, 1Mb or 2MB components, providing a wide range of
density options. Cards are based on the 28F010 (1Mb)
or 28F020 components which work with 5V V
CC
/12V V
PP
applications. Device codes are
B4h
and
BDh
respectively
(Manufacture ID
89
for Intel and
31
for Catalyst). Systems
should be able to recognize all the codes. Cards utilizing
the1Mb components provide densities ranging from
256KB to 2.5MB in 256KB increments, cards utilizing 2Mb
components provide densities ranging from 512KB to 5MB
in 512KB increments.
In support of the PC Card 95 standard for word wide access
devices are paired. Write, read and erase operations can
be performed as either a word or byte wide operation .
By multiplexing A0, CE1 and CE2, 8-bit hosts can access
all data on data lines DQ0 - DQ7. The FLG series cards
conform to the PC Card Standard (PCMCIA) and JEIDA,
providing electrical and physical compatibility. The PC
Card form factor offers an industry standard pinout and
mechanical outline, allowing density upgrades without
system design changes.
WEDC’s standard cards are shipped with WEDC’s Logo.
Cards are also available with blank housings (no Logo).
The blank housings are available in both a recessed
(for label) and flat housing. Please contact WEDC
sales representative for further information on Custom
artwork.
FEATURES
Low cost Low/Medium Density Linear Flash Card
Supports 5V systems with 12V V
PP
.
Based on Intel CMOS Components
Fast Read Performance - 150ns Maximum Access
Time
x8/ x16 Data Interface
Quick-Pulse Programming Algorithm - typical 10µs
Byte-Program
100,000 Erase/Program Cycles
PC Card Standard Type I Form Factor
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
BLOCK DIAGRAM
Vcc
PCMCIA Flash Memory Card
FLG Series
Vpp2
Device Pair 9
Device 19
Vpp1
Device 18
CSL9
CSH9
Array Address
Bus
A1-A17(18)
ADDRESS
BUFFER
ADDRESS BUS
A1-A21(22)
Control
Address
Bus
Vcc
CSH9
CSH0
Device Pair 1
CSL9
Device 3
Device 2
CSL1
Device Pair 0
Device 1
Device 0
CSL0
CSL0
CSH1
C9
High
C0
Control Logic
PCMCIA
Interface
C9
Low
C0
Ctrl Att enable
WE#
OE#
CE2#
CE1#
REG#
A0
WP
CSH0
Attrib. Mem
CIS
EEPROM 2kB
WR#
Vcc
DATA
BUS
Q8-Q15
DATA
BUS
Q0-Q7
RD#
Q0-Q7
control
Vcc
I/O buffer
DATA
BUS
D8-D15
DATA
BUS
D0-D7
SUPPORTED COMPONENTS (max 20 X):
28F010-max 2.5MB
28F020-max 5MB
CD1#
Device type
28F010
28F020
Manuf ID
Intel/Catalyst
89H / 31H
89H / 31H
Device ID
B4
H
BD
H
CD2#
GND
WAIT#
BVD1
BVD2
Vcc
Vcc
open
open
VS1
VS2
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
PINOUT
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal name
GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
A8
A13
A14
WE#
RDY/BSY#
V
CC
V
PP
1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O
I/O
Function
Ground
Data bit 3
Data bit 4
Data bit 5
Data bit 6
Data bit 7
Card enable 1
Address bit 10
Output enable
Address bit 11
Address bit 9
Address bit 8
Address bit 13
Address bit 14
Write Enable
Ready/Busy
Supply Voltage
Prog. Voltage
Address bit 16
Address bit 15
Address bit 12
Address bit 7
Address bit 6
Address bit 5
Address bit 4
Address bit 3
Address bit 2
Address bit 1
Address bit 0
Data bit 0
Data bit 1
Data bit 2
Write Potect
Ground
HIGH
LOW
N.C.
LOW
LOW
Active
Pin
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
PCMCIA Flash Memory Card
FLG Series
Signal name
GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
RFU
RFU
A17
A18
A19
A20
A21
V
CC
V
PP
2
A22
A23
A24
A25
VS2
RST
Wait#
RFU
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND
I/O
O
I/O
I/O
I/O
I/O
I
I
O
Function
Ground
Card Detect 1
Data bit 11
Data bit 12
Data bit 13
Data bit 14
Data bit 15
Card Enable 2
Voltage Sense 1
Reserved
Reserved
Active
LOW
LOW
N.C.
I
I
I
I
I
Address bit 17
Address bit 18
Address bit 19
Address bit 20
Address bit 21
Supply Voltage
Prog. Voltage
256KB(2)
512KB(2)
1MB(2)
2MB(2)
4MB(2,3)
I
I
I
I
O
I
O
I
O
O
I/O
I/O
O
O
Address bit 22
Address bit 23
Address bit 24
Address bit 25
Voltage Sense 2
Card Reset
Extended Bus cycle
Reserved
Attrib Mem Select
Bat. Volt. Detect 2
Bat. Volt. Detect 1
Data bit 8
Data bit 9
Data bit 10
Card Detect 2
Ground
8MB(2,3)
N.C.
N.C.
N.C.
N.C.
N.C.
LOW(1)
(1)
(1)
LOW
Notes:
1.
WAIT#, BVD1 and BVD2 are driven high for compatibility
2.
Shows density for which specified address bit is MSB. Higher order address bits are no connects (i.e. 4MB A21 is MSB A22 - A25 are NC).
3.
For the 3MB card the memory will wrap at the 4MB boundary, for the 5MB card the memory will wrap at the 8MB boundary.
MECHANICAL
1.0mm 0.05
(0.039”)
Interconnect area
1.6mm 0.05
(0.063”)
10.0mm MIN
(0.400”)
3.0mm MIN
Substrate area
54.0mm
(2.126”)
0.10
1.0mm 0.05
(0.039”)
10.0mm MIN
(0.400”)
85.6mm
(3.370”)
0.20
3.3mm T1 (0.130”)
T1=0.10mm interconnect area
T1=0.20mm substrate area
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
Symbol
A
0
- A
25
Type
INPUT
Name and Function
PCMCIA Flash Memory Card
FLG Series
CARD SIGNAL DESCRIPTION
ADDRESS INPUTS:
A
0
through A
25
enable direct addressing of up to 64MB of memory on the card. Signal A
0
is not used in
word access mode. The memory will wrap at the card density boundary (see PINOUT, note 3). The system should not try to
access memory beyond the card density. A
25
is the most significant bit. A
23
- A
25
are not connected.
DATA INPUT/OUTPUT:
DQ
0
THROUGH DQ
15
constitute the bi-directional databus. DQ
0
- Dq
7
constitute the lower (even) byte
and DQ
8
- DQ
15
the upper (odd) byte. DQ
15
is the MSB.
CARD ENABLE 1 AND 2:
CE
1
enables even byte accesses, CE
2
enables odd byte accesses. Multiplexing A
0
, CE
1
and CE
2
allows 8-bit hosts to access all data on DQ
0
- DQ
7
.
OUTPUT ENABLE:
Active low signal gating read data from the memory card.
DQ
0
- DQ
15
CE
1#
, CE
2#
OE#
INPUT/OUTPUT
INPUT
INPUT
WE#
RDY/BSY#
CD
1#
, CD
2#
WP
INPUT
N.C.
OUTPUT
OUTPUT
WRITE ENABLE:
Active low signal gating write data to the memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase or program algorithms. This signal is not
connected.
CARD DETECT 1 and 2:
Provide card insertion detection. These signals are connected to ground internally on the memory
card. The host shall monitor these signals to detect card insertion (pulled-up on host side).
WRITE PROTECT:
Write protect reflects the status of the Write Protect switch on the memory card. WP set to high = write
protected, providing internal hardware write lockout to the Flash array.If card does not include optional write protect switch, this
signal will be pulled low internally indicating write protect = “off”.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages 12.0V for lower byte (D
0
- D
7
) memory components.
PROGRAM/ERASE POWER SUPPLY:
Provides programming voltages 12.0V for lower byte (D
8
- D
15
) memory components.
V
PP
1
V
PP
2
V
CC
GND
REG#
RST#
WAIT#
BVD
1
, BVD
2
VS
1
, VS
2
RFU
CARD POWER SUPPLY:
5.0V
CARD GROUND
INPUT
N.C.
OUTPUT
OUTPUT
OUTPUT
ATTRIBUTE MEMORY SELECT : Active low signal, enables access to Attribute Memory Plane, occupied
by Card Information Structure and Card Registers.
RESET:
Active high signal for placing card in Power-on default state. This signal is not connected.
WAIT:
This signal is pulled high internally for compatibility. No wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card’s V
CC
requirements. VS
1
and VS
2
are open to indicate a 5V card has
been inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven or left floating
N.C.
READ function
Function Mode
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
WRITE function*
Standby Mode
Byte Access (8 bits)
Word Access (16 bits)
Odd-Byte Only Access
FUNCTIONAL TRUTH TABLE
Common Memory
REG#
X
H
H
H
H
X
H
H
H
H
Attribute Memory
REG#
X
L
L
L
L
X
L
L
L
L
CE
2#
H
H
H
L
L
H
H
H
L
L
CE
1#
H
L
L
L
H
H
L
L
L
H
A
0
X
L
H
X
X
X
L
H
X
X
OE#
X
L
L
L
L
X
H
H
H
H
WE#
X
H
H
H
H
X
L
L
L
L
D
15
-D
8
High-Z
High-Z
High-Z
Odd-Byte
Odd-Byte
X
X
X
Odd-Byte
Odd-Byte
D
7
-D
0
High-Z
Even-Byte
Odd-Byte
Even-Byte
High-Z
X
Even-Byte
Odd-Byte
Even-Byte
X
D
15
-D
8
High-Z
High-Z
High-Z
Not Valid
Not Valid
X
X
X
X
X
D
7
-D
0
High-Z
Even-Byte
Not Valid
Even-Byte
High-Z
X
Even-Byte
X
Even-Byte
X
* Require proper programming voltages (V
pp
1, V
pp
2). Program or Erase with an invalid V
pp
should not be attempted.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
Operating Temperature TA (ambient)
Commercial
Industrial
Storage Temperature
Commercial
Industrial
Voltage on any pin relative to V
SS
PCMCIA Flash Memory Card
FLG Series
ABSOLUTE MAXIMUM RATINGS
(2)
0°C to +60 °C
-40°C to +85 °C
-30°C to +80 °C
-40°C to +85 °C
-0.5V to V
CC
+0.5V
V
CC
supply Voltage relative to V
SS
-0.5V to +7.0V
Note: Stress greater than those listed under “Absolute Maximum ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation at these or any other conditions greater than
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
Sym
I
CCR
I
CCW
I
PPW
I
CCE
I
PPE
I
CCS
(CMOS)
Parameter
V
CC
Read Current
V
CC
Program Current
V
CC
Program Current
V
CC
Erase Current
V
PP
Erase Current
V
CC
Standby Current
Density
All
All
All
All
All
256KB
512KB
1MB
2MB
3MB
4MB
5MB
DC CHARACTERISTICS
(1)
Notes
V
PP
= 12V
V
PP
= 12V
V
PP
= 12V
V
PP
= 12V
Typ
(4)
10
1.0
8.0
5.0
10
100
Max
30
10
30
15
30
Units
mA
mA
mA
mA
mA
µA
Test Conditions
V
CC
= V
CC
max tcycle = 150ns, CMOS levels
Programming in Progress
V
PP
=V
PP
H Programming in Progress
Erasure in Progress
V
PP
=V
PP
H Erasure in Progress
V
CC
= V
CC
max
Control Signals = V
CC
CMOS levels
CMOS TEST Conditions: V
CC
= 5V ± 5%, V
IL
= V
SS
± 0.2V, V
IH
= V
CC
± 0.2V
Notes:
1.
All currents are RMS values unless otherwise specified. I
CCR
, I
CCW
and I
CCE
are based on Byte wide operations. For 16 bit operation values are double
2.
Control Signals: CE
1#
, CE
2#
, OE#, WE#, REG#.
3.
Typical: V
CC
= 5V, T = +25°C.
Symbol
I
LI
I
LO
V
IIL
V
IH
V
OL
V
OH
V
LKO
Parameter
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
CC
Erase/Program Lock Voltage
Notes
1
1
1
1
1
1
1
Min
Max
±10
±10
Units
µA
µA
V
V
V
V
V
Test Conditions
V
CC
= V
CC
MAX
V
IN
=V
CC
or V
SS
V
CC
= V
CC
MAX
V
OUT
=V
CC
or V
SS
0
0.7V
CC
V
CC
-0.4
2.5
0.8
V
CC+
0.5
0.4
V
CC
I
OL
= 3.2mA
I
OH
= -2.0mA
Notes:
1. Values are the same for byte and word wide modes for all card densities.
2. Exceptions: Leakage currents on CE
1#
, CE
2#
, OE#, REG# and WE# will be < 500 µA when V
IN
= GND due to internal pull-up resistors.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2003
Rev. 4
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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