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81RIA40PBF

Phase Control Thyristors (Stud Version), 80 A

器件类别:模拟混合信号IC    触发装置   

厂商名称:Vishay(威世)

厂商官网:http://www.vishay.com

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Vishay(威世)
零件包装代码
TO-94
包装说明
POST/STUD MOUNT, O-MUPM-H3
针数
3
Reach Compliance Code
compli
Factory Lead Time
18 weeks
标称电路换相断开时间
110 µs
配置
SINGLE
关态电压最小值的临界上升速率
500 V/us
最大直流栅极触发电流
120 mA
最大直流栅极触发电压
3.5 V
最大维持电流
200 mA
JEDEC-95代码
TO-209AC
JESD-30 代码
O-MUPM-H3
最大漏电流
15 mA
通态非重复峰值电流
1900 A
元件数量
1
端子数量
3
最大通态电流
80000 A
最高工作温度
125 °C
最低工作温度
-40 °C
封装主体材料
METAL
封装形状
ROUND
封装形式
POST/STUD MOUNT
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
最大均方根通态电流
125 A
断态重复峰值电压
400 V
重复峰值反向电压
400 V
表面贴装
NO
端子形式
HIGH CURRENT CABLE
端子位置
UPPER
处于峰值回流温度下的最长时间
NOT SPECIFIED
触发设备类型
SCR
Base Number Matches
1
文档预览
80RIA...PbF, 81RIA...PbF, 82RIA...PbF Series
Vishay Semiconductors
Phase Control Thyristors (Stud Version), 80 A
FEATURES
• Hermetic glass-metal seal
• International standard case TO-209AC (TO-94)
• Compliant to RoHS directive 2002/95/EC
• Designed and qualified for industrial level
TYPICAL APPLICATIONS
TO-209AC (TO-94)
• DC motor controls
• Controlled DC power supplies
• AC controllers
80 A
PRODUCT SUMMARY
I
T(AV)
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
50 Hz
I
TSM
60 Hz
50 Hz
60 Hz
V
DRM
/V
RRM
t
q
T
J
Typical
TEST CONDITIONS
VALUES
80
T
C
85
125
1900
1990
18
16
400 to 1200
110
- 40 to 125
V
μs
°C
kA
2
s
A
UNITS
A
°C
I
2
t
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
40
80RIA
81RIA
80
120
V
DRM
/V
RRM
, MAXIMUM
REPETITIVE PEAK AND
OFF-STATE VOLTAGE
V
400
800
1200
V
RSM
, MAXIMUM NON-REPETITIVE
PEAK VOLTAGE
V
500
900
1300
15
I
DRM
/I
RRM
MAXIMUM
AT T
J
= 125 °C
mA
Document Number: 94392
Revision: 17-Sep-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
1
80RIA...PbF, 81RIA...PbF, 82RIA...PbF Series
Vishay Semiconductors
Phase Control Thyristors
(Stud Version), 80 A
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at case temperature
Maximum RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
DC at 75 °C case temperature
t = 10 ms
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
I
2
t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
100 % V
RRM
reapplied
VALUES
80
85
125
1900
1990
1600
Sinusoidal half wave,
initial T
J
= T
J
maximum
1675
18
16
12.7
11.7
180.5
0.99
1.13
2.29
1.84
1.60
200
400
kA
2
s
V
kA
2
s
A
UNITS
A
°C
t = 0.1 ms to 10 ms, no voltage reapplied
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
x I
T(AV)
< I <
x I
T(AV)
), T
J
= T
J
maximum
(I >
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 250 A, T
J
= 25 °C, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
m
V
mA
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
TEST CONDITIONS
T
J
= 125 °C, V
d
= Rated V
DRM
, I
TM
= 2 x dI/dt snubber
0.2 μF, 15
,
gate pulse: 20 V, 65
,
t
p
= 6 μs, t
r
= 0.5 μs
Per JEDEC standard RS-397, 5.2.2.6.
Gate pulse: 10 V, 15
source, t
p
= 6 μs, t
r
= 0.1 μs,
V
d
= Rated V
DRM
, I
TM
= 50 Adc, T
J
= 25 °C
I
TM
= 50 A, T
J
= T
J
maximum, dI/dt = - 5 A/μs, V
R
= 50 V,
dV/dt = 20 V/μs, gate bias: 0 V 25
,
t
p
= 500 μs
VALUES
300
UNITS
A/μs
t
d
t
q
1
μs
110
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= 125 °C exponential to 67 % rated V
DRM
T
J
= 125 °C rated V
DRM
/V
RRM
applied
VALUES
500
15
UNITS
V/μs
mA
www.vishay.com
2
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94392
Revision: 17-Sep-10
80RIA...PbF, 81RIA...PbF, 82RIA...PbF Series
Phase Control Thyristors
(Stud Version), 80 A
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
T
J
= - 40 °C
Maximum DC gate current required to trigger
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= - 40 °C
Maximum DC gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
DC gate current not to trigger
I
GD
T
J
= T
J
maximum
DC gate voltage not to trigger
V
GD
Maximum gate current/voltage not to
trigger is the maximum value which
will not trigger any unit with rated
V
DRM
anode to cathode applied
Maximum required gate trigger/
current/voltage are the lowest value
which will trigger all units 6 V anode
to cathode applied
T
J
= T
J
maximum, t
p
5 ms
TEST CONDITIONS
T
J
= T
J
maximum, t
p
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
VALUES
12
3
3
20
10
270
120
60
3.5
2.5
1.5
6
mA
V
mA
UNITS
W
A
V
Vishay Semiconductors
0.25
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating junction
temperature range
Maximum storage temperature range
Maximum thermal resistance,
junction to case
Maximum thermal resistance,
case to heatsink
SYMBOL
T
J
T
Stg
R
thJC
R
thCS
DC operation
Mounting surface, smooth, flat and greased
Non-lubricated threads
Mounting torque, ± 10 %
Lubricated threads
Approximate weight
Case style
See dimensions - link at the end of datasheet
TEST CONDITIONS
VALUES
- 40 to 125
- 40 to 150
0.30
K/W
0.1
15.5
(137)
14
(120)
130
UNITS
°C
N·m
(lbf · in)
g
TO-209AC (TO-94)
Document Number: 94392
Revision: 17-Sep-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
3
80RIA...PbF, 81RIA...PbF, 82RIA...PbF Series
Vishay Semiconductors
R
thJC
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
0.042
0.050
0.064
0.095
0.164
RECTANGULAR CONDUCTION
0.030
0.052
0.070
0.100
0.165
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Phase Control Thyristors
(Stud Version), 80 A
Note
• The table above shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Maximum Allowable Case T
emperature (°C)
Maximum Allowable Case T
emperature (°C)
130
80RIA S
eries
R
thJC
(DC) = 0.30 K/W
120
130
120
110
80RIA S
eries
R
thJC
(DC) = 0.30 K/W
110
Conduc tion Angle
Conduction Period
100
90
30°
80
70
0
20
40
60
80
100
120
140
Average On-state Current (A)
60°
90°
120°
180°
DC
100
30°
60°
90°
120°
180°
90
80
0
10 20
30 40
50 60 70
80 90
Average On-s
tate Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 2 - Current Ratings Characteristics
Maximum Average On-s
tate Power Loss (W)
120
hS
R
t
110
100
90
80
70
60
50
180°
120°
90°
60°
30°
RMSLimit
6
0.
W
K/
A
=
/W
4K
0.
1
K/
W
e lt
-D
a
1.4
K/
W
2K
/W
R
40
30
20
Conduction Angle
3 K/
W
10
0
0
10
20
30
40
80RIA S
eries
T = 125°C
J
50
60
70
80
0
5 K/ W
25
50
75
100
125
Average On-state Current (A)
Maximum Allowable Ambient T
emperature (°C)
Fig. 3 - On-State Power Loss Characteristics
www.vishay.com
4
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94392
Revision: 17-Sep-10
80RIA...PbF, 81RIA...PbF, 82RIA...PbF Series
Phase Control Thyristors
(Stud Version), 80 A
Maximum Average On-state Power Los (W)
s
180
160
140
Vishay Semiconductors
120
100
80
60
40
20
0
DC
180°
120°
90°
60°
30°
R
th
S
A
=
0.
6K
/W
0.
4
K/
W
-D
el
ta
1K
/W
R
RMSLimit
Conduc tion Period
1. 4
K/ W
W
3 K/ W
2 K/
80RIA S
eries
T = 125°C
J
0
20
40
60
80
100
120
5 K/ W
140
0
25
50
75
100
125
Average On-state Current (A)
Maximum Allowable Ambient T
emperature (°C)
Fig. 4 - On-State Power Loss Characteristics
Peak Half S Wave On-s
ine
tate Current (A)
1600
At Any Rated Load Condition And With
Rated V
RRM
Applied Following Surge.
Initial T
J
= 125°C
at 60 Hz 0.0083 s
at 50 Hz 0.0100 s
1400
Peak Half S Wave On-state Current (A)
ine
1800
2000
Maximum Non Repetitive Surge Current
1900
Versus Pulse Train Duration. Control
1800 Of Conduction May Not Be Maintained.
Initial T
J
= 125°C
1700
No Voltage Reapplied
1600
Rated V
RRM
Reapplied
1500
1400
1300
1200
1100
1000
900
80RIA S
eries
800
700
0.01
1200
1000
80R S
IA eries
800
1
10
100
Number Of Equa l Amplitude Half Cycle Current Pulses (N)
0.1
1
Puls T
e rain Duration (s)
Fig. 5 - Maximum Non-Repetitive Surge Current
Fig. 6 - Maximum Non-Repetitive Surge Current
10000
Instantaneous On-state Current (A)
1000
100
T = 25°C
J
T = 125°C
J
10
80RIA Series
1
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Instantaneous On-state Voltage (V)
Fig. 7 - On-State Voltage Drop Characteristics
Document Number: 94392
Revision: 17-Sep-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
5
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