820x
Acceleration Processor
Data Sheet
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Hifn Confidential
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DS-0157-D, © April 1, 2010, Hi/fn
®
, Inc. All rights reserved. 04/10
No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or
translated into any language in any form by any means without the written permission of Hi/fn, Inc. (“Hifn”)
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820x – Data Sheet, DS-0157-D
Hifn Confidential
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Table of Contents
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
1 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1
1.1.1
1.1.2
1.1.3
1.1.4
1.1.5
1.1.6
1.1.7
1.2
High Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flexible Design for Packet Processing . . . . . . . . . . . . . . . . . . . .
Engine Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Command and Data Endian Conversion Modes . . . . . . . . . . . . . .
DMA Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Integrity Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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20
20
21
21
22
22
22
22
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1
2.1.1
2.1.2
2.1.3
ECC & Parity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CRC Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Real Time Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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2.1.3.1
2.1.3.2
2.1.3.3
24
27
27
27
Data Integrity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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2.1.4
2.1.5
2.2
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Compression Engine Real Time Verification . . . . . . . . . . . . . . 28
Encryption Engine Real Time Verification . . . . . . . . . . . . . . . . 29
Hash Engine Real Time Verification . . . . . . . . . . . . . . . . . . . . 30
31
33
Data Integrity Model for Encode Operations . . . . . . . . . . . . . . . .
Data Integrity Model for Decode Operations . . . . . . . . . . . . . . . .
Clock Domains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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2.3
Clock Gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3 Data Structures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
37
39
41
Command Pointer Ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1.2
Command Descriptor Format . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1.2.1
3.1.2.2
3.1.2.3
3.1.2.4
3.1.2.5
3.1.2.6
3.1.2.7
3.1.3
3.1.3.1
3.1.3.2
Desc_result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Desc_cmd_base . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Desc_cmd_cmp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Desc_cmd_enc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Desc_cmd_hash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Desc_cmd_pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Desc_srcX and Desc_dstX . . . . . . . . . . . . . . . . . . . . . . . . . . 64
67
Initial Hash engine Value (IHV) . . . . . . . . . . . . . . . . . . . . . . 67
MAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Command Structure Conventions . . . . . . . . . . . . . . . . . . . . . . .
3.1.4
3.2
3.3
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3.1.3.4
3.1.3.5
3.1.3.6
3.1.3.7
3.1.3.8
3.1.3.9
3.1.3.3 Initialization Vector (IV) and Additional Authenticated Data (AAD)
71
Key Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Data Stream Information Fields . . . . . . . . . . . . . . . . . . . . . . 76
Hash Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
IPAD & OPAD for HMAC & SSL3.0-MAC (SHA256 | MD5) . . . . . 79
AES-GCM and GMAC Operations . . . . . . . . . . . . . . . . . . . . . . 80
MAC Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
85
3.1.3.10 IPsec Packet Processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Free Pool Ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Result Ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Command Operation Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
4 Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
4.1.1
4.1.2
4.1.3
4.1.4
Hash Engine before Compression Engine . . . . . . . . . . . . . . . . . .
Hash Engine after Compression Engine . . . . . . . . . . . . . . . . . . .
Hash Engine after Pad Engine. . . . . . . . . . . . . . . . . . . . . . . . .
Hash Engine after Encryption Engine . . . . . . . . . . . . . . . . . . . .
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3.1.1
Command Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
98
98
99
100
101
Encode Operations Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
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4.2
Decode Operations Data Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.2.1
4.2.2
4.2.3
4.2.4
Hash Engine before Encryption Engine. . . . . . . . . . . . . . . . . . .
Hash Engine after Encryption Engine . . . . . . . . . . . . . . . . . . . .
Hash Engine after Pad Engine. . . . . . . . . . . . . . . . . . . . . . . . .
Hash Engine after Compression Engine . . . . . . . . . . . . . . . . . .
102
103
104
105
5 Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.2
5.3
PCIe Outbound Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCIe Inbound Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Command Pointer Ring Prefetch . . . . . . . . . . . . . . . . . . . . . . .
Read Request Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write Request Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Completion Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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107
107
107
107
108
109
109
DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Channel Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
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Channel Manager Inbound Data Controller . . . . . . . . . . . . . . . .
Channel Manager Source Buffer . . . . . . . . . . . . . . . . . . . . . . .
Channel Manager Outbound Data Controller. . . . . . . . . . . . . . .
Channel Manager Result Buffer. . . . . . . . . . . . . . . . . . . . . . . .
Channel Manager Data Process Controller . . . . . . . . . . . . . . . .
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111
111
112
112
5.4
PKP Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
PKP Inbound Data Controller . . . . . . . . . . . . . . . . . . . . . . . . .
PKP Source Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PKP Outbound Data Controller . . . . . . . . . . . . . . . . . . . . . . . .
PKP Result Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PKP Interface Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PKP Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
113
113
113
114
114
114
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5.5
5.6
5.6.1
5.6.2
5.6.3
5.6.4
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RNG Engine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Hash Engine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Hash In_AFIFO & Out_AFIFO . . . . . . . . . . . . . . . . . . . . . . . . .
Hash_AFIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hash Interface Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hash Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
115
115
116
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