16K ROM Preprogrammed with SystemSoft Keyboard Controller and Scanner
Firmware V
CC
e
5V
g
10%
83C51SL
16K Factory Programmed ROM V
CC
e
5V
g
10%
87C51SL
16K OTP ROM V
CC
e
5V
g
10%
Low Voltage 80C51SL CPU with RAM and I O V
CC
e
3 3V
g
0 3V
Low Voltage 81C51SL 16K ROM Preprogrammed with SystemSoft Keyboard Controller
and Scanner Firmware V
CC
e
3 3V
g
0 3V
Low Voltage 83C51SL 16K Factory Programmed ROM V
CC
e
3 3V
g
0 3V
Low Voltage 87C51SL 16K OTP ROM V
CC
e
3 3V
g
0 3V
Proliferation of 8051 Architecture
Complete 8042 Keyboard Control
Functionality
8042 Style Host Interface
Optional Hardware Speedup of
GATEA20 and RCL
Local 16 x 8 Keyboard Switch Matrix
Support
Two Industry Standard Serial Keyboard
Interfaces Supported via Four High
Drive Outputs
5 LED Drivers
Low Power CHMOS Technology
Y
Y
Y
Y
4-Channel 8-Bit A D
Interface for up to 32 Kbytes of
External Memory
Slew Rate Controlled I O Buffers Used
to Minimize Noise
256 Bytes Data RAM
Three Multifunction I O Ports
10 Interrupt Sources with 6 User-
Definable External Interrupts
2 MHz– 16 MHz Clock Frequency
100-Pin PQFP (8XC51SL)
100-Pin SQFP (Low Voltage 8XC51SL)
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
The 8XC51SL based on Intel’s industry-standard MCS 51 microcontroller family is designed for keyboard
control in laptop and notebook PCs The highly integrated keyboard controller incorporates an 8042-style UPI
host interface with expanded memory keyboard scan and power management The 8XC51SL supports both
serial and scanned keyboard interfaces and is available in pre-programmed versions to reduce time to market
The Low Voltage 8XC51SL is the 3 3V version optimized for even further power savings Throughout the
remainder of this document both devices will generally be referred to as 51SL
The 8XC51SL is a pin-for-pin compatible replacement for the 8XC51SL-BG It does however have some
additional functionality Those additional functions are as follows
1 16K OTP ROM The 8XC51SL-BG had only 8K of ROM
2 New Register Set The 8XC51SL adds a second set of host interface registers available for use in support-
ing power management This required an additional address line (A1) for decoding To accommodate this
one V
CC
pin was removed However in order to maintain compatibility with the -BG version an enable bit
for this new register set was added in configuration register 1 This allows the 8XC51SL to be drop in
compatible to existing 8XC51SL-BG designs no software modifications required
NOTE
The changes made to the V
CC
pins require that all three V
CC
pins be properly connected Failing to do so
could result in high leakage current and possible damage to the device
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
INTEL CORPORATION 1995
November 1994
Order Number 272271-002
8XC51SL LOW VOLTAGE 8XC51SL
272271 –1
Figure 1 Block Diagram
2
8XC51SL LOW VOLTAGE 8XC51SL
272271 –2
Figure 2 Connection Diagram (PQFP and SQFP)
PACKAGES
Part
8XC51SL
Low Voltage 8XC51SL
Prefix
KU
SB
Suffix
AH
AL
Package Type
100-Pin PQFP
100-Pin SQFP
3
8XC51SL LOW VOLTAGE 8XC51SL
PIN DESCRIPTIONS
Table 1 Pin Descriptions
Symbol
V
SS
V
CC
PCDB0– 7
WRL
RDL
CSL
A0– A1
PCOBF
GATEA20
RCL PROGL
LED0– 3
KSI0 –7
KSO0– 15
PORT 1
P10 A0 –
P17 A7
LOADREN
PORT2
P20 –6 A8– 14
P27 LED4
PORT 3
I O
I
I O
I O
I
I
I
I
O
O
O
O
I
O
I O
Type
Circuit ground potential
Supply voltage during normal Idle and Power-Down operation nominally
a
5V
g
10% for 8XC51SL
a
3 3V
g
0 3V for Low Voltage 8XC51SL
Host interface data bus An 8-bit bidirectional port for data transfers between the
host processor and the keyboard controller
The active-low host-interface write signal
The active-low host-interface read signal
The active-low host-interface chip select
Host-Interface Address select inputs
The active-high host-interface Output Buffer Full interrupt
Gate A20 control signal output
Host reset active low This pin is also the program pulse input during EPROM
programming
LED output drivers
Keyboard input scan lines (input Port 0) Schmitt inputs with 5K – 20K pull-up
resistors
Keyboard output scan lines
Port 1 is a general-purpose 8-bit bidirectional port with internal pull-ups It also
supports the following user-selectable functions
P10–P16 are available for connection to dedicated keyboard inputs A0 – A7 output
the low-order address byte (refer to LOADREN signal)
Low address enable When set high address bits A0 – A7 are output on P10 – P17
Port 2 is a general-purpose 8-bit bidirectional port with internal pull-ups on P20 – 6
A8– 14 It also supports the following user-selectable functions
P20–6 A8–14 output the high-order address byte
P27 LED4 is available as a fifth LED output driver (by writing to the port bit 7)
Port 3 is a general-purpose 8-bit bidirectional port P32 INT0 P34 T0 P36 WRL
and P37 RDL have internal pull-ups P30 SIF00 P31 SIF01 P33 SIF10 and
P35 SIF11 are high-drive open-drain outputs It also supports the following user-
selectable functions
A high-drive open-drain output to support an external serial keyboard interface
新型耐压测试系统研究 介绍由工业PC控制的且符合IEC61010标准的耐压测试系统。系统由程控电源、测试回路、信号采样/调理电路和数据采集接口卡等部分组成。实验表明，系统工作稳定，数据重复精度高。 关键词：耐压；测试；工业PC Research on a New Type of Withstanding Voltage Testing System YANG Shengbing,...[详细]
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