Integrated
Circuit
Systems, Inc.
ICS9248-185
Frequency Generator & Integrated Buffers for PENTIUM/Pro
TM
& K6
Recommended Application:
VIA PM133 chipset
Output Features:
•
2 - CPUs @ 2.5V
•
5 - SDRAM @ 3.3V
•
3 - PCI @ 3.3V,
•
1 - 48MHz, @ 3.3V fixed.
•
2 - REF @ 3.3V, 14.318MHz.
Features:
• Up to 133MHz frequency support
• Support power management: PCI_STOP &
CLK_STOP
• Spread spectrum for EMI control (-0.5% down
spread).
• Uses external 14.318MHz crystal
• FS pins for frequency select
Key Specifications:
• CPU – PCI Skew: 1-4ns
• PCI – PCI Skew: ±500ps
• CPU – CPU Skew: ±175ps
• CPU Jitter: 250ps (cyc-cyc)
• PCI Jitter: 500ps (cyc-cyc)
Block Diagram
Pin Configuration
VDD
REF0
GND
X1
X2
VDDPCI
1
*PCICLK_F
GND
1, 2
FS1/PCICLK0
BUFFER_IN
1
PCICLK1
PCI_STOP#
GND
*FS0/48MHz
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
REF1/FREE_SEL*
VDDL
CPUCLK0/_F
CPUCLK1
GND
CLK_STOP#
SDRAM0/_F
SDRAM1
SDRAM2
GND
VDDSDR
SDRAM3
SDRAM4
VDD48
1
28-Pin SSOP/TSSOP
* Internal Pull-up Resistor of 120K to VDD
1. These pin will have 2X drive strength
2. FS1 is a pull down
Frequency Select
ICS9248-185
PLL2
48MHz
FS1
0
FS0
0
1
0
1
CPUCLK
66.66
100.00
97.00
133.33
PCICLK
33.33
33.33
32.33
33.33
Down
Spread
-0.5%
-0.5%
-0.5%
-0.5%
X1
X2
XTAL
OSC
CPU
DIVDER
Stop
REF (1:0)
2
CPUCLK1
CPUCLK0/_F
0
1
1
PLL1
Spread
Spectrum
BUFFER_IN
Control
PCI_STOP#
CLK_STOP#
FS (1:0)
Logic
PCI
DIVDER
Stop
2
Stop
4
SDRAM (4:1)
SDRAM0/_F
PCICLK (1:0)
PCICLK_F
Config.
Reg.
Pentium is a trademark of Intel Corporation
I
2
C is a trademark of Philips Corporation
9248-185 RevE- 12/15/08
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
ICS9248-185
General Description
The
ICS9248-185
is the single chip clock solution for Notebook designs using the 440BX or the VIA Apollo Pro 133 style
chipset. It provides all necessary clock signals for such a system. The
ICS9248-185
provides CPU and PCI clocks with
continous spread spectrum. The
ICS9248-185
employs a proprietary closed loop design, which tightly controls the percentage
of spreading over process and temperature variations.
Pin Descriptions
PIN
P I N NA M E
NUMBER
1, 6, 15, 18, VDD
2
3, 8, 13,
19, 24
4
5
7
9
10
11
12
14
16, 17, 20,
21
22
23
25
26
27
28
REF0
GND
X1
X2
PCICLK_F
FS1
1, 2
PCICLK0
BUFFER IN
PCICLK1
PCI_STOP#
FS0
1, 2
48MHz
SDRAM (4:1)
SDRAM0/_F
CLK_STOP#
CPUCLK1
CPUCLK0/_F
VDDL
FREE_SEL
REF1
TYPE
PWR
OUT
PWR
IN
OUT
OUT
IN
OUT
IN
OUT
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
PWR
IN
OUT
DESCRIPTION
Power supply, nominal 3.3V
14.318 Mhz reference clock.This REF output is the STRONGER buffer
f o r I S A BU S l o a d s
Ground
Crystal input, has internal load cap (36pF) and feedback resistor from X2
Crystal output, nominally 14.318MHz.
Free running PCI clock not affected by PCI_STOP# for power management.
Frequency select pin. Latched Input.
PCI clock output. Synchronous to CPU clocks with 1-4ns skew (CPU early)
Input to Fanout Buffers for SDRAM outputs.
PCI clock output. Synchronous to CPU clocks with 1-4ns skew (CPU early)
Halts PCICLK clocks at logic 0 level, when input low
(In mobile mode, MODE=0)
Frequency select pin. Latched Input
48MHz output clock
SDRAM clock outputs, Fanout Buffer outputs from BUFFER IN pin
(controlled by chipset).
Either free running SDRAM or stoppable depending on FREE_SEL
This asynchronous input halts CPUCLKs, & SDRAMs at logic "0" level
when driven low.
CPU clock output, powered by VDDL
Either free running CPUCLK or stoppable depending on FREE_SEL
Supply for CPU clocks 2.5V
Selects CPUCLK0/_F and SDRAM0/_F to be either free running or
stoppable by CLK_STOP#. When FREE_SEL is set to (0) low the above
clocks are free running - when set to (1) high, the clocks are stoppable.
14.318 MHz reference clock.
Notes:
1: Internal Pull-up Resistor of 120K to 3.3V on indicated inputs
2: Bidirectional input/output pins, input logic levels are latched at internal power-on-reset. Use 10Kohm resistor
to program logic Hi to VDD or GND for logic low.
2
ICS9248-185
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ambient Operating Temperature . . . . . . . . . . . .
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature . . . . . . . . . . . . . . . . . . . . . .
5.5 V
GND –0.5 V to V
DD
+0.5 V
0°C to +70°C
115°C
–65°C to +150°C
Stresses above those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. These ratings are stress
specifications only and functional operation of the device at these or any other conditions above those listed in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70C; Supply Voltage V
DD
= 3.3 V +/-5%, V
DDL
= 2.5 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
2
Input High Voltage
V
IH
V
SS
-0.3
Input Low Voltage
V
IL
63
C
L
= 30 pF; Select @ 66MHz
Operating Supply
I
DD3.3OP
67
C
L
= 30 pF; Select @ 100MHz
Current
73
C
L
= 30 pF; Select @ 133MHz
I
DDPD
Powerdown Current
CL = 0 pF; Input address VDD or GND
V
DD
= 3.3 V
12
14.318
Input Frequency
F
i
Input Capacitance
Clk Stabilization
1
Skew
1
1
MAX
V
DD
+0.3
0.8
150
170
180
600
16
5
45
5.5
4
UNITS
V
V
mA
µA
MHz
pF
pF
ms
ns
C
IN
C
INX
T
STAB
t
CPU-PCI1
Logic Inputs
X1 & X2 pins
From V
DD
= 3.3 V to 1% target Freq.
V
T
= 1.5 V
27
1
36
28
1
Guaranteed by design, not 100% tested in production.
3
ICS9248-185
Electrical Characteristics - CPU
T
A
= 0 - 70C; V
DD
= 3.3 V +/-5%; C
L
= 20 pF
PARAMETER
SYMBOL
Output High Voltage
V
OH2A
I
OH
= -20 mA
I
OL
= 12 mA
Output Low Voltage
V
OL2A
V
OH
= 2.0 V
Output High Current
I
OH2A
V
OL
= 0.8 V
Output Low Current
I
OL2A
Rise Time
1
CONDITIONS
MIN
2.4
22
TYP
2.85
0.31
-45
29
0.9
1
MAX UNITS
V
0.4
V
-27
mA
mA
1.6
1.6
55
175
150
250
ns
ns
%
ps
ps
ps
t
r2A
t
f2A
d
t2A
t
sk2A
1
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5 V
V
T
= 1.5 V
V
T
= 1.5 V Dram not running, CPU=66.6MHz
V
T
= 1.5 V Dram running
45
Fall Time
1
Duty Cycle
1
Skew window
1
Jitter, Cycle-to-cycle
Jitter, Cycle-to-cycle
1
1
50
35
123
119
t
jcyc-cyc2A
t
jcyc-cyc2A
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - CPU
T
A
= 0 - 70C; VDDL= 2.5V, +/-5%; C
L
= 20 pF
PARAMETER
SYMBOL
I
OH
= -20 mA
Output High Voltage
V
OH2A
I
OL
= 12 mA
Output Low Voltage
V
OL2A
V
OH
= 2.0 V
Output High Current
I
OH2A
V
OL
= 0.8 V
Output Low Current
I
OL2A
Rise Time
1
Fall Time
1
CONDITIONS
MIN
2
22
TYP
2.3
0.31
-39
26
0.96
1.06
MAX UNITS
V
0.4
V
-21
mA
mA
1.6
1.6
55
175
150
250
ns
ns
%
ps
ps
ps
t
r2A
t
f2A
d
t2A
t
sk2A
t
jcyc-cyc2A
t
jcyc-cyc2A
V
OL
= 0.4 V, V
OH
= 2.0 V
V
OH
= 2.0 V, V
OL
= 0.4 V
V
T
= 1.25 V
V
T
= 1.25 V
V
T
= 1.25 V Dram not running
V
T
= 1.25 V Dram running
45
Duty Cycle
1
Skew window
1
Jitter, Cycle-to-cycle
1
Jitter, Cycle-to-cycle
1
1
50.3
35
123
119
Guaranteed by design, not 100% tested in production.
4
ICS9248-185
Electrical Characteristics - PCI
T
A
= 0 - 70C; V
DD
= 3.3 V , VDDL = 2.5V, +/-5%; C
L
= 30 pF
PARAMETER
SYMBOL
CONDITIONS
I
OH
= -18 mA
Output High Voltage
V
OH1
Output Low Voltage
V
OL1
I
OL
= 9.4 mA
V
OH
= 2.0 V
Output High Current
I
OH1
V
OL
= 0.8 V
Output Low Current
I
OL1
Rise Time
1
Fall Time
1
Duty Cycle
1
Skew window
1
Jitter, Cycle to cycle
1
MIN
2.4
38
TYP
3
0.2
-62
43
1.51
1.47
MAX UNITS
V
0.4
V
-33
mA
mA
2
2
55
500
500
ns
ns
%
ps
ps
t
r1
t
f1
d
t1
t
sk1
t
cycle
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5 V
V
T
= 1.5 V
V
T
= 1.5 V
45
50.1
58
145
Guaranteed by design, not 100% tested in production.
Electrical Characteristics - SDRAM
T
A
= 0 - 70C; V
DD
= 3.3 V, VDDL= 2.50V, +/-5%; C
L
= 30 pF
PARAMETER
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time
1
SYMBOL
V
OH3
V
OL3
I
OH3
I
OL3
T
r3
T
f3
D
t3
T
sk3
T
sk3
CONDITIONS
I
OH
= -28 mA
I
OL
= 19 mA
V
OH
= 2.0 V
V
OL
= 0.8 V
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5 V
V
T
= 1.5 V
V
T
= 1.5 V
MIN
2.4
32
TYP
3
0.3
-69
42
1.07
1.3
50.8
104
MAX UNITS
V
0.4
V
-46
mA
mA
1.3
ns
2
55
250
5
ns
%
ps
ns
Fall Time
1
Duty Cycle
1
Skew window
1
Propagation Time
1
(Buffer In to output)
1
45
Guaranteed by design, not 100% tested in production.
5
