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933715600652

IC HCT SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20, PLASTIC, SO-20, Bus Driver/Transceiver

器件类别:逻辑    逻辑   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
SOIC
包装说明
SOP,
针数
20
Reach Compliance Code
unknown
系列
HCT
JESD-30 代码
R-PDSO-G20
JESD-609代码
e4
长度
12.8 mm
逻辑集成电路类型
BUS DRIVER
湿度敏感等级
1
位数
1
功能数量
8
端口数量
2
端子数量
20
最高工作温度
125 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
INVERTED
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
传播延迟(tpd)
36 ns
认证状态
Not Qualified
座面最大高度
2.65 mm
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子面层
NICKEL PALLADIUM GOLD
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
7.5 mm
Base Number Matches
1
文档预览
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT540
Octal buffer/line driver; 3-state;
inverting
Product specification
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state;
inverting
FEATURES
Inverting outputs
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT540 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
74HC/HCT540
The 74HC/HCT540 are octal inverting buffer/line drivers
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs OE
1
and OE
2
.
A HIGH on OE
n
causes the outputs to assume a high
impedance OFF-state.
The “540” is identical to the “541” but has inverting outputs.
TYPICAL
SYMBOL
t
PHL
/ t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay A
n
to Y
n
input capacitance
power dissipation capacitance per buffer notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
9
3.5
39
HCT
11
3.5
44
ns
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
PIN DESCRIPTION
PIN NO.
1, 19
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
20
SYMBOL
OE
1
, OE
2
A
0
to A
7
GND
Y
0
to Y
7
V
CC
NAME AND FUNCTION
74HC/HCT540
output enable input (active LOW)
data inputs
ground (0 V)
bus outputs
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
FUNCTION TABLE
INPUTS
OE
1
L
L
X
H
Notes
OE
2
L
L
H
X
74HC/HCT540
OUTPUT
A
n
L
H
X
X
Y
n
H
L
Z
Z
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
Fig.5 Logic diagram.
December 1990
4
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state; inverting
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
I
CC
category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL PARAMETER
+25
−40
to
+85
max.
125
25
21
200
40
34
200
40
34
75
15
13
−40
to
+125
min. max.
150
30
26
240
48
41
240
48
41
90
18
15
ns
74HC/HCT540
TEST CONDITIONS
UNIT V
CC
WAVEFORMS
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.6
min. typ. max. min.
t
PHL
/ t
PLH
propagation delay
A
n
to Y
n
3-state output
enable time
OE to Y
n
3-state output
disable time
OE to Y
n
output transition time
30
11
9
52
19
15
61
22
18
14
5
4
100
20
17
160
32
27
160
32
27
60
12
10
t
PZH
/ t
PZL
ns
Fig.7
t
PHZ
/ t
PLZ
ns
Fig.7
t
THL
/ t
TLH
ns
Fig.6
December 1990
5
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