INTEGRATED CIRCUITS
74LV10
Triple 3-input NAND gate
Product data
Supersedes data of 1998 Apr 20
2003 Mar 04
Philips
Semiconductors
Philips Semiconductors
Product data
Triple 3-input NAND gate
74LV10
FEATURES
•
Optimized for Low Voltage applications: 1.0 V to 3.6 V
•
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
•
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
•
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
•
Output capability: standard
•
I
CC
category: SSI
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
2.5 ns
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
PARAMETER
Propagation delay
nA, nB, nC to nY
Input capacitance
Power dissipation capacitance per gate
T
amb
= 25
°C.
T
amb
= 25
°C.
DESCRIPTION
The 74LV10 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT10.
The 74LV10 provides the 3-input NAND function.
CONDITIONS
C
L
= 15 pF;
V
CC
= 3.3 V
See Notes 1 and 2
TYPICAL
9
3.5
12
UNIT
ns
pF
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW)
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ
(C
L
×
V
CC2
×
f
o
) where:
N = number of outputs switching;
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES
14-Pin Plastic SO
TEMPERATURE RANGE
–40
°C
to +125
°C
ORDER CODE
74LV10D
PKG. DWG. #
SOT108-1
PIN CONFIGURATION
1A
1B
2A
2B
2C
2Y
GND
1
2
3
4
5
6
7
14 VCC
13 1C
12 1Y
11 3C
10 3B
9
8
3A
3Y
PIN DESCRIPTION
PIN NUMBER
1, 3, 9
2, 4, 10
7
12, 6, 8
13, 5, 11
14
SYMBOL
1A – 3A
1B – 3B
GND
1Y – 3Y
1C – 3C
V
CC
NAME AND FUNCTION
Data inputs
Data inputs
Ground (0 V)
Data outputs
Data inputs
Positive supply voltage
SV00416
2003 Mar 04
2
Philips Semiconductors
Product data
Triple 3-input NAND gate
74LV10
LOGIC SYMBOL (IEEE/IEC)
1
2
13
3
4
5
9
10
11
&
12
&
LOGIC DIAGRAM (ONE GATE)
A
B
6
C
Y
&
8
SV00419
SV00418
FUNCTION TABLE
INPUTS
OUTPUTS
nC
L
H
L
H
L
H
L
H
nY
H
H
H
H
H
H
H
L
nA
nB
L
L
H
H
L
L
H
H
LOGIC SYMBOL
1
2
13
1A
1B
1C
1Y
12
L
L
L
L
H
H
H
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
3
4
5
2A
2B
2C
2Y
6
9
10
11
3A
3B
3C
3Y
8
SV00417
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
O
T
amb
PARAMETER
DC supply voltage
Input voltage
Output voltage
Operating ambient temperature range in free air
See DC and AC
characteristics
V
CC
= 1.0 V to 2.0 V
t
r
, t
f
Input rise and fall times
V
CC
= 2.0 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
CONDITIONS
See Note1
MIN
1.0
0
0
–40
–40
–
–
–
–
–
–
TYP.
3.3
–
–
MAX
3.6
V
CC
V
CC
+85
+125
500
200
100
UNIT
V
V
V
°C
ns/V
ns/V
ns/V
NOTE:
1. The LV is guaranteed to function down to V
CC
= 1.0 V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2 V to
V
CC
= 3.6 V.
2003 Mar 04
3
Philips Semiconductors
Product data
Triple 3-input NAND gate
74LV10
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
±I
IK
±I
OK
±I
O
±I
GND
,
±I
CC
T
stg
P
TOT
DC supply voltage
DC input diode current
DC output diode current
DC output source or sink current
(standard outputs)
DC V
CC
or GND current for types with standard
outputs
Storage temperature range
Power dissipation per package
– plastic mini-pack (SO)
for temperature range: –40
°C
to +125
°C
above +70
°C
derate linearly with 8 mW/K
V
I
< –0.5 V or V
I
> V
CC
+ 0.5 V
V
O
< –0.5 V or V
O
> V
CC
+ 0.5 V
–0.5 V < V
O
< V
CC
+ 0.5 V
PARAMETER
CONDITIONS
RATING
–0.5 to +4.6
20
50
25
50
–65 to +150
500
UNIT
V
mA
mA
mA
mA
°C
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
V
CC
= 1.2 V
V
IH
HIGH l
l Input
t
level I
voltage
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 1.2 V
V
IL
LOW l
level I
l Input
t
voltage
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 1.2 V; V
I
= V
IH
or V
IL;
–I
O
= 100
µA
V
O
OH
HIGH level output
voltage; all outputs
V
CC
= 2.0 V; V
I
= V
IH
or V
IL;
–I
O
= 100
µA
V
CC
= 2.7 V; V
I
= V
IH
or V
IL;
–I
O
= 100
µA
V
CC
= 3.0 V; V
I
= V
IH
or V
IL;
–I
O
= 100
µA
V
OH
HIGH level output
voltage; STANDARD
outputs
V
CC
= 3.0 V; V
I
= V
IH
or V
IL;
–I
O
= 6 mA
V
CC
= 1.2 V; V
I
= V
IH
or V
IL;
I
O
= 100
µA
V
O
OL
LOW level output
voltage; all outputs
V
CC
= 2.0 V; V
I
= V
IH
or V
IL;
I
O
= 100
µA
V
CC
= 2.7 V; V
I
= V
IH
or V
IL;
I
O
= 100
µA
V
CC
= 3.0 V; V
I
= V
IH
or V
IL;
I
O
= 100
µA
V
OL
I
I
I
CC
∆I
CC
LOW level output
voltage; STANDARD
outputs
Input leakage current
Quiescent supply
current; SSI
Additional quiescent
supply current per
input
V
CC
= 3.0 V; V
I
= V
IH
or V
IL;
I
O
= 6 mA
V
CC
= 3.6 V; V
I
= V
CC
or GND
V
CC
= 3.6 V; V
I
= V
CC
or GND; I
O
= 0
V
CC
= 2.7 V to 3.6 V; V
I
= V
CC
– 0.6 V
1.8
2.5
2.8
2.40
1.2
2.0
2.7
3.0
2.82
0
0
0
0
0.25
0.2
0.2
0.2
0.40
1.0
20.0
500
0.2
0.2
0.2
0.50
1.0
40
850
V
µA
µA
µA
V
1.8
2.5
2.8
2.20
V
V
–40
°C
to +85
°C
MIN
0.9
1.4
2.0
0.3
0.6
0.8
TYP
1
MAX
–40
°C
to +125
°C
MIN
0.9
1.4
2.0
0.3
0.6
0.8
V
V
MAX
UNIT
NOTE:
1. All typical values are measured at T
amb
= 25
°C.
2003 Mar 04
4
Philips Semiconductors
Product data
Triple 3-input NAND gate
74LV10
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
≤
2.5 ns; C
L
= 50 pF; R
L
= 1 kΩ
SYMBOL
PARAMETER
WAVEFORM
CONDITION
V
CC
(V)
1.2
t
PHL/PLH
/
Propagation delay
g
y
nA, nB, nC to nY
Figure 1, 2
1
2.0
2.7
3.0 to 3.6
NOTES:
1. Unless otherwise stated, all typical values are measured at T
amb
= 25
°C.
2. Typical values are measured at V
CC
= 3.3 V.
LIMITS
–40
°C
to +85
°C
MIN
TYP
1
55
19
14
10
2
36
26
21
44
33
26
ns
MAX
–40
°C
to +125
°C
MIN
MAX
UNIT
AC WAVEFORMS
V
M
= 1.5 V at V
CC
≥
2.7 V;
V
M
= 0.5
×
V
CC
at V
CC
<
2.7 V;
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
VI
nA, nB, nC
INPUT
GND
t PHL
VOH
nY OUTPUT
VOL
VM
t PLH
VM
TEST CIRCUIT
V
CC
V
I
PULSE
GENERATOR
R
T
D.U.T.
V
O
50pF
C
L
R
L
= 1k
Test Circuit for switching times
DEFINITIONS
SV00420
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
TEST
t
PLH/
t
PHL
V
CC
< 2.7V
2.7–3.6V
V
I
V
CC
2.7V
Figure 1. Input (nA, nB, nC) to output (nY) propagation delays.
SV00901
Figure 2. Load circuitry for switching times.
2003 Mar 04
5
