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935186090118

LV/LV-A/LVX/H SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT-163-1, SOP-20

器件类别：逻辑    逻辑   

厂商名称：NXP(恩智浦)

厂商官网：https://www.nxp.com

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参数 预览 参数对比
器件参数
参数名称
属性值
厂商名称
NXP(恩智浦)
包装说明
SOP,
Reach Compliance Code
unknown
其他特性
OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION
系列
LV/LV-A/LVX/H
JESD-30 代码
R-PDSO-G20
JESD-609代码
e4
长度
12.8 mm
逻辑集成电路类型
BUS DRIVER
位数
4
功能数量
2
端口数量
2
端子数量
20
最高工作温度
125 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
传播延迟（tpd）
36 ns
座面最大高度
2.65 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
1 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子面层
NICKEL PALLADIUM GOLD
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
宽度
7.5 mm
文档预览
74LV241
Octal buffer/line driver; 3-state
Rev. 03 — 10 October 2005
Product data sheet
1. General description
The 74LV241 is a low-voltage, Si-gate CMOS device and is pin and function compatible
with 74HC241 and 74HCT241.
The 74LV241 is an octal non-inverting buffer/line driver with 3-state outputs. The 3-state
outputs are controlled by the output enable inputs (pins 1OE and 2OE).
2. Features
s
s
s
s
s
Optimized for low-voltage applications from 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V and T
amb
= 25
°C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V and T
amb
= 25
°C
ESD protection:
x
HBM EIA/JESD22-A114-C exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns.
Symbol
Parameter
Conditions
C
L
= 15 pF;
V
CC
= 3.3 V
V
CC
= 3.3 V;
V
I
= GND to V
CC
[1]
Min
-
-
-
Typ
8.0
3.5
30
Max
-
-
-
Unit
ns
pF
pF
t
PHL
, t
PLH
propagation delay
1An to 1Yn, 2An to 2Yn
C
i
C
PD
[1]
input capacitance
power dissipation
capacitance
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
Philips Semiconductors
74LV241
Octal buffer/line driver; 3-state
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74LV241N
74LV241D
74LV241DB
74LV241PW
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
DIP20
SO20
SSOP20
TSSOP20
Description
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT146-1
SOT163-1
SOT339-1
SOT360-1
Type number
5. Functional diagram
2
1A0
1Y0
18
4
1A1
1Y1
16
6
1A2
1Y2
14
8
1
1A3
1OE
1Y3
12
17
2A0
2Y0
3
15
2A1
2Y1
5
13
2A2
2Y2
7
11
19
2A3
2OE
2Y3
9
mna772
Fig 1. Functional diagram
74LV241_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 10 October 2005
2 of 17
Philips Semiconductors
74LV241
Octal buffer/line driver; 3-state
1
2
17
4
15
6
13
8
11
1
1A0
2A0
1A1
2A1
1A2
2A2
1A3
2A3
1OE
1Y0
2Y0
1Y1
2Y1
1Y2
2Y2
1Y3
2Y3
18
3
2
16
5
14
7
12
9
11
13
15
19
2OE
mna771
EN
18
16
14
12
4
6
8
19
EN
9
7
5
3
mna773
17
Fig 2. Logic symbol
Fig 3. IEC logic symbol
6. Pinning information
6.1 Pinning
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
1
2
3
4
5
6
7
8
9
20 V
CC
19 2OE
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
11 2A3
001aad445
241
GND 10
Fig 4. Pin configuration
6.2 Pin description
Table 3:
Symbol
1OE
1A0
2Y0
1A1
2Y1
Pin description
Pin
1
2
3
4
5
Description
1 output enable input (active LOW)
1 data input 0
2 bus output 0
1 data input 1
2 bus output 1
74LV241_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 10 October 2005
3 of 17
Philips Semiconductors
74LV241
Octal buffer/line driver; 3-state
Pin description
…continued
Pin
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Description
1 data input 2
2 bus output 2
1 data input 3
2 bus output 3
ground (0 V)
2 data input 3
1 bus output 3
2 data input 2
1 bus output 2
2 data input 1
1 bus output 1
2 data input 0
1 bus output 0
2 output enable input (active HIGH)
supply voltage
Table 3:
Symbol
1A2
2Y2
1A3
2Y3
GND
2A3
1Y3
2A2
1Y2
2A1
1Y1
2A0
1Y0
2OE
V
CC
7. Functional description
7.1 Function table
Table 4:
Input
1OE
L
L
H
[1]
Function table
[1]
Output
1An
L
H
X
1Yn
L
H
Z
Input
2OE
H
H
L
2An
L
H
X
Output
2Yn
L
H
Z
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
74LV241_3
Parameter
supply voltage
input clamping current
Conditions
V
I
<
−0.5
V or
V
I
> V
CC
+ 0.5 V
Min
−0.5
-
-
-
Max
+4.6
±20
±50
±35
Unit
V
mA
mA
mA
output clamping current V
I
<
−0.5
V or
V
I
> V
CC
+ 0.5 V
output current
V
O
= 0.5 V to V
CC
+ 0.5 V
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 10 October 2005
4 of 17
Philips Semiconductors
74LV241
Octal buffer/line driver; 3-state
Table 5:
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
I
CC
I
GND
T
stg
P
tot
Parameter
supply current
ground current
storage temperature
total power dissipation
DIL20 package
SO20 package
(T)SSOP20 package
[1]
Conditions
Min
-
-
−65
Max
±70
±70
+150
750
500
400
Unit
mA
mA
°C
mW
mW
mW
T
amb
=
−40 °C
to +125
°C
[1]
-
-
-
For DIL20 packages: above 70
°C
the value of P
tot
derates linearly with 12 mW/K.
For SO20 packages: above 70
°C
the value of P
tot
derates linearly with 8 mW/K.
For (T)SSOP20 packages: above 60
°C
the value of P
tot
derates linearly with 5.5 mW/K.
9. Recommended operating conditions
Table 6:
Symbol
V
CC
V
I
V
O
T
amb
t
r
, t
f
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
in free air
V
CC
= 2.0 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
[1]
Conditions
[1]
Min
1.0
0
0
−40
-
-
-
Typ
3.3
-
-
-
-
-
-
Max
3.6
V
CC
V
CC
+125
500
200
100
Unit
V
V
V
°C
ns/V
ns/V
ns/V
input rise and fall times V
CC
= 1.0 V to 2.0 V
The 74LV241 is guaranteed to function down to 1.0 V (input levels GND or V
CC
); static characteristics are
guaranteed from V
CC
= 1.2 V to V
CC
= 3.6 V.
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
V
IH
Parameter
HIGH-level input voltage
Conditions
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
IL
LOW-level input voltage
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
Min
0.9
1.4
2.0
-
-
-
Typ
-
-
-
-
-
-
Max
-
-
-
0.3
0.6
0.8
Unit
V
V
V
V
V
V
T
amb
=
−40 °C
to +85
°C
[1]
74LV241_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 10 October 2005
5 of 17
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参数对比
与935186090118相近的元器件有：74LV241PW,118、74LV241PW,112、74LV241N,112、74LV241D,118、74LV241D,112、74LV241DB,118、74LV241DB,112、935186090112。描述及对比如下：
型号 935186090118 74LV241PW,118 74LV241PW,112 74LV241N,112 74LV241D,118 74LV241D,112 74LV241DB,118 74LV241DB,112 935186090112
描述 LV/LV-A/LVX/H SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT-163-1, SOP-20 IC BUF NON-INVERT 3.6V 20TSSOP IC BUF NON-INVERT 3.6V 20TSSOP IC BUFFER NON-INVERT 3.6V 20DIP IC BUFFER NON-INVERT 3.6V 20SO IC BUFFER NON-INVERT 3.6V 20SO IC BUF NON-INVERT 3.6V 20SSOP IC BUF NON-INVERT 3.6V 20SSOP LV/LV-A/LVX/H SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT-163-1, SOP-20
厂商名称 NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦) NXP(恩智浦)
包装说明 SOP, TSSOP, TSSOP, TSSOP16,.25 0.300 INCH, PLASTIC, MS-001, SC-603, SOT-146-1, DIP-20 SOP, SOP, SOP20,.4 SSOP, 5.30 MM, PLASTIC, MO-150, SOT-339-1, SSOP-20 SOP,
Reach Compliance Code unknown unknown compliant compliant unknown compliant unknown compliant unknown
其他特性 OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION OUTPUT ENABLE ACTIVE HIGH FOR ONE FUNCTION
系列 LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 代码 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDIP-T20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609代码 e4 e4 e4 e4 e4 e4 e4 e4 e4
长度 12.8 mm 6.5 mm 6.5 mm 26.73 mm 12.8 mm 12.8 mm 7.2 mm 7.2 mm 12.8 mm
逻辑集成电路类型 BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
位数 4 4 4 4 4 4 4 4 4
功能数量 2 2 2 2 2 2 2 2 2
端口数量 2 2 2 2 2 2 2 2 2
端子数量 20 20 20 20 20 20 20 20 20
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP TSSOP TSSOP DIP SOP SOP SSOP SSOP SOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH IN-LINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE
传播延迟（tpd） 36 ns 36 ns 36 ns 36 ns 36 ns 36 ns 36 ns 36 ns 36 ns
座面最大高度 2.65 mm 1.1 mm 1.1 mm 4.2 mm 2.65 mm 2.65 mm 2 mm 2 mm 2.65 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 1 V 1 V 1 V 1 V 1 V 1 V 1 V 1 V 1 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES NO YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
端子面层 NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
端子形式 GULL WING GULL WING GULL WING THROUGH-HOLE GULL WING GULL WING GULL WING GULL WING GULL WING
端子节距 1.27 mm 0.65 mm 0.65 mm 2.54 mm 1.27 mm 1.27 mm 0.65 mm 0.65 mm 1.27 mm
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
宽度 7.5 mm 4.4 mm 4.4 mm 7.62 mm 7.5 mm 7.5 mm 5.3 mm 5.3 mm 7.5 mm
Brand Name - NXP Semiconductor NXP Semiconductor NXP Semiconductor NXP Semiconductor NXP Semiconductor NXP Semiconductor NXP Semiconductor -
是否Rohs认证 - 符合 符合 符合 符合 符合 符合 符合 -
零件包装代码 - TSSOP2 TSSOP2 DIP SOP SOP SSOP2 SSOP2 -
针数 - 20 20 20 20 20 20 20 -
制造商包装代码 - SOT360-1 SOT360-1 SOT146-1 SOT163-1 SOT163-1 SOT339-1 SOT339-1 -
负载电容（CL） - 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF -
湿度敏感等级 - 1 1 - 1 1 1 1 -
峰值回流温度（摄氏度） - NOT SPECIFIED 260 260 NOT SPECIFIED 260 NOT SPECIFIED 260 -
认证状态 - Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified -
处于峰值回流温度下的最长时间 - NOT SPECIFIED 30 30 NOT SPECIFIED 30 NOT SPECIFIED 30 -
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器件捷径:
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ
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