74LVC14A
Hex inverting Schmitt trigger with 5 V tolerant input
Rev. 5 — 23 December 2011
Product data sheet
1. General description
The 74LVC14A provides six inverting buffers with Schmitt trigger input. It is capable of
transforming slowly-changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as a translator in mixed 3.3 V and 5 V applications.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
5 V tolerant input for interfacing with 5 V logic
CMOS low-power consumption
Direct interface with TTL levels
Unlimited input rise and fall times
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Multiple package options
Specified from
40 C
to +85
C
and from
40 C
to +125
C
3. Applications
Wave and pulse shapers for highly noisy environments
Astable multivibrators
Monostable multivibrators
NXP Semiconductors
74LVC14A
Hex inverting Schmitt trigger with 5 V tolerant input
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LVC14AD
74LVC14ADB
40 C
to +125
C
40 C
to +125
C
Name
SO14
SSOP14
TSSOP14
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT108-1
SOT337-1
SOT402-1
Type number
74LVC14APW
40 C
to +125
C
74LVC14ABQ
40 C
to +125
C
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1
quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
5. Functional diagram
1
2
1
1A
1Y
2
3
4
3
2A
2Y
4
5
6
5
3A
3Y
6
9
8
9
4A
4Y
8
11
5A
5Y
10
11
10
13
6A
6Y
12
13
12
mna204
001aac497
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
A
Y
mna025
Fig 3.
Logic diagram for one Schmitt trigger
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 23 December 2011
2 of 18
NXP Semiconductors
74LVC14A
Hex inverting Schmitt trigger with 5 V tolerant input
6. Pinning information
6.1 Pinning
terminal 1
index area
1Y
2A
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
001aac518
2
3
4
5
6
7
GND
4Y
8
14 V
CC
13 6A
12 6Y
11 5A
10 5Y
9
4A
14 V
CC
13 6A
12 6Y
2Y
3A
3Y
GND
(1)
14A
11 5A
10 5Y
9
8
4A
4Y
1
1A
14A
001aac519
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4.
Pin configuration SO14, SSOP14 and
TSSOP14
Fig 5.
Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A, 2A, 3A, 4A, 5A, 6A
1Y, 2Y, 3Y, 4Y, 5Y, 6Y
GND
V
CC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input
data output
ground (0 V)
supply voltage
7. Functional description
Table 3.
Input nA
L
H
[1]
H = HIGH voltage level; L = LOW voltage level
Function table
[1]
Output nY
H
L
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 23 December 2011
3 of 18
NXP Semiconductors
74LVC14A
Hex inverting Schmitt trigger with 5 V tolerant input
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
[4]
Parameter
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
[1]
[2][3]
Min
0.5
0.5
0.5
50
-
-
-
100
65
Max
+6.5
+6.5
V
CC
+ 0.5
-
50
50
100
-
+150
500
Unit
V
V
V
mA
mA
mA
mA
mA
C
mW
V
I
< 0 V
V
O
> V
CC
or V
O
< 0 V
V
O
= 0 V to V
CC
T
amb
=
40 C
to +125
C
[4]
-
The minimum input voltage ratings may be exceeded if the input current ratings are observed.
The output voltage ratings may be exceeded if the output current ratings are observed.
When V
CC
= 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
For SO14 packages: P
tot
derates linearly with 8 mW/K above 70
C.
For (T)SSOP14 packages: P
tot
derates linearly with 5.5 mW/K above 60
C.
For DHVQFN14 packages: P
tot
derates linearly with 4.5 mW/K above 60
C.
9. Recommended operating conditions
Table 5.
Symbol
V
CC
V
I
V
O
T
amb
Recommended operating conditions
Parameter
supply voltage
functional
input voltage
output voltage
ambient temperature
Conditions
Min
1.65
1.2
0
0
40
Typ
-
-
-
-
-
Max
3.6
-
5.5
V
CC
+125
Unit
V
V
V
V
C
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 23 December 2011
4 of 18
NXP Semiconductors
74LVC14A
Hex inverting Schmitt trigger with 5 V tolerant input
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol
V
OH
Parameter
HIGH-level
output voltage
Conditions
V
I
= V
T+
or V
T
I
O
=
100 A;
V
CC
= 1.65 V to 3.6 V
I
O
=
4
mA; V
CC
= 1.65 V
I
O
=
8
mA; V
CC
= 2.3 V
I
O
=
12
mA; V
CC
= 2.7 V
I
O
=
18
mA; V
CC
= 3.0 V
I
O
=
24
mA; V
CC
= 3.0 V
V
OL
LOW-level
voltage output
V
I
= V
T+
or V
T
I
O
= 100
A;
V
CC
= 1.65 V to 3.6 V
I
O
= 4 mA; V
CC
= 1.65 V
I
O
= 8 mA; V
CC
= 2.3 V
I
O
= 12 mA; V
CC
= 2.7 V
I
O
= 24 mA; V
CC
= 3.0 V
I
I
I
CC
I
CC
C
I
input leakage
current
supply current
additional
supply current
input
capacitance
V
CC
= 3.6 V; V
I
= 5.5 V or GND
V
CC
= 3.6 V; V
I
= V
CC
or GND;
I
O
= 0 A
per input pin; V
CC
= 2.7 V to 3.6 V;
V
I
= V
CC
0.6 V; I
O
= 0 A
V
CC
= 0 V to 3.6 V; V
I
= GND to V
CC
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
5
4.0
0.2
0.45
0.6
0.4
0.55
5
10
500
-
-
-
-
-
-
-
-
-
-
0.3
0.65
0.8
0.6
0.8
20
40
5000
-
V
V
V
V
V
A
A
A
pF
V
CC
0.2
1.2
1.8
2.2
2.4
2.2
-
-
-
-
-
-
-
-
-
-
-
-
V
CC
0.3
1.05
1.65
2.05
2.25
2.0
-
-
-
-
-
-
V
V
V
V
V
V
40 C
to +85
C
Min
Typ
[1]
Max
40 C
to +125
C
Unit
Min
Max
[1]
All typical values are measured at V
CC
= 3.3 V (unless stated otherwise) and T
amb
= 25
C.
11. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see
Figure 7.
Symbol Parameter
t
pd
propagation delay
Conditions
nA to nY; see
Figure 6
V
CC
= 1.2 V
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 3.6 V
t
sk(o)
output skew time
V
CC
= 3.0 V to 3.6 V
[3]
[2]
40 C
to +85
C
Min
-
1.0
1.5
1.5
1.0
-
Typ
[1]
16
6.1
3.5
3.6
3.2
-
Max
-
12.7
7.8
7.5
6.4
1.0
40 C
to +125
C
Unit
Min
-
1.0
1.5
1.5
1.0
-
Max
-
14.7
10.0
9.5
8.0
1.5
ns
ns
ns
ns
ns
ns
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 23 December 2011
5 of 18
