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935267098518

0.4MHz, OTHER DSP, PQFP80, 14 X 20 X 2.80 MM, PLASTIC, QFP-80

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

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器件参数
参数名称
属性值
Objectid
8074340365
包装说明
QFP,
Reach Compliance Code
unknown
kg CO2e/kg
12
Average Weight (mg)
633.05
CO2e (mg)
7596.6
YTEOL
0
桶式移位器
NO
边界扫描
NO
最大时钟频率
0.4 MHz
格式
FIXED POINT
内部总线架构
MULTIPLE
JESD-30 代码
R-PQFP-G80
长度
20 mm
低功率模式
NO
端子数量
80
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
QFP
封装形状
RECTANGULAR
封装形式
FLATPACK
座面最大高度
3.2 mm
最大供电电压
3.6 V
最小供电电压
3 V
标称供电电压
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
GULL WING
端子节距
0.8 mm
端子位置
QUAD
宽度
14 mm
uPs/uCs/外围集成电路类型
DIGITAL SIGNAL PROCESSOR, OTHER
文档预览
INTEGRATED CIRCUITS
DATA SHEET
SAA7706H
Car radio Digital Signal Processor
(DSP)
Product specification
File under Integrated Circuits, IC01
2001 Mar 05
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
CONTENTS
1
1.1
1.2
2
3
4
5
6
7
8
8.1
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
8.1.6
8.2
8.3
8.4
8.4.1
8.4.2
8.4.3
8.5
8.6
8.6.1
8.7
8.7.1
8.7.2
8.7.3
8.7.4
8.7.5
8.7.6
8.8
8.8.1
8.9
8.10
8.11
8.12
8.12.1
8.12.2
FEATURES
Hardware
Software
APPLICATIONS
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
Analog front-end
The realization of common mode input with AIC
Realization of the auxiliary input with volume
control
Realization of the FM input control
Pins VDACN1, VDACN2 and VDACP
Pin VREFAD
Supply of the analog inputs
The signal audio path for input signals CD,
TAPE, AUX, PHONE, NAV and AM
Signal path for level information
Signal path from FM_MPX input to IAC and
stereo decoder
Noise level
Mono or stereo switching
The automatic lock system
DCS clock
The Interference Absorption Circuit (IAC)
General description
The Filter Stream DAC (FSDAC)
Interpolation filter
Noise shaper
Function of pin POM
Power-off plop suppression
Pin VREFDA for internal reference
Supply of the filter stream DAC
Clock circuit and oscillator
Supply of the crystal oscillator
The phase-locked loop circuit to generate the
DSPs and other clocks
Supply of the digital part (V
DDD3V1
to V
DDD3V4
)
CL_GEN, audio clock recovery block
External control pins
DSP1
DSP2
8.15.1
8.15.2
8.15.3
8.15.4
8.16
8.17
9
9.1
9.2
9.3
9.4
9.5
9.5.1
9.6
10
11
12
13
14
15
16
17
18
18.1
18.2
18.3
18.4
18.5
19
20
21
22
8.13
8.14
8.14.1
8.14.2
8.14.3
8.15
SAA7706H
I
2
C-bus control (pins SCL and SDA)
Digital serial inputs/outputs and SPDIF inputs
General description digital serial audio
inputs/outputs
General description SPDIF inputs (SPDIF1 and
SPDIF2)
Digital data stream formats
RDS demodulator (pins RDS_CLOCK
and RDS_DATA)
Clock and data recovery
Timing of clock and data signals
Buffering of RDS data
Buffer interface
DSP reset
Test mode connections (pins TSCAN, RTCB
and SHTCB)
I
2
C-BUS FORMAT
Addressing
Slave address (pin A0)
Write cycles
Read cycles
SAA7706H hardware registers
SAA7706H DSPs registers
I
2
C-bus memory map specification
LIMITING VALUES
THERMAL CHARACTERISTICS
CHARACTERISTICS
RDS AND I
2
S-BUS TIMING
I
2
C-BUS TIMING
SOFTWARE DESCRIPTION
APPLICATION DIAGRAM
PACKAGE OUTLINE
SOLDERING
Introduction to soldering surface mount
packages
Reflow soldering
Wave soldering
Manual soldering
Suitability of surface mount IC packages for
wave and reflow soldering methods
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I
2
C COMPONENTS
2001 Mar 05
2
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
1
1.1
FEATURES
Hardware
SAA7706H
5-bitstream 3rd-order sigma-delta Analog-to-Digital
Converters (ADCs) with anti-aliasing broadband input
filter
1-bitstream 1st-order sigma-delta ADC with anti-aliasing
broadband input filter
4-bitstream Digital-to-Analog Converters (DACs) with
128-fold oversampling and noise shaping
Integrated semi-digital filter; no external post filter
required for DAC
Dual media support: allowing separate front-seat and
rear-seat signal sources and separate control
Simultaneous radio and audio processing
Digital FM stereo decoder
Digital FM interference suppression
RDS demodulation via separate ADC; with buffered
output option
Two mono Common-Mode Rejection Ratio (CMRR)
input stages for voice signals from phone and navigation
inputs
Phone and navigation mixing at DAC front outputs
Two stereo CMRR input stages (CD-walkman and
CD-changer etc.)
Analog single-ended TAPE and AUX input
Separate AM-left and AM-right inputs in the event of use
of external AM stereo decoder
One digital input: I
2
S-bus or LSB-justified format
Two digital inputs: SPDIF format
Co-DSP support via I
2
S-bus or LSB-justified format
Audio output short-circuit protected
I
2
C-bus controlled (including fast mode)
MOST bus interfacing (details in separate manual)
Phase-locked loop derives the internal clocks from one
common fundamental crystal oscillator
Combined AM/FM level input
Pin compatible with SAA7705 and SAA7708
All digital inputs are tolerant of 5 V input levels
All analog inputs have high GSM immunity
Low number of external components required
• −40
to +85
°C
operating temperature range
Easy applicable.
1.2
Software
Improved FM weak signal processing
Integrated 19 kHz MPX filter; de-emphasis and stereo
detection
Electronic adjustments: FM or AM level, FM channel
separation, Dolby®
(1)
level
Baseband audio processing (treble, bass, balance,
fader and volume)
Four channel 5-band parametric equalizer
9-bands mono audio spectrum analyzer
Extended beep functions with tone sequencer for phone
rings
Large volume jumps e-power interpolated to prevent
zipper noise
Dual media support; allowing separate front-seat and
rear-seat signal sources and separate control
Dynamic loudness or bass boost
Audio level monitor
Tape equalization and Music Search System (MSS)
detection for tape
Dolby-B tape noise reduction (at 44.1 kHz only)
Dynamics compression available in all modes
CD de-emphasis processing
Voice-over possibility for phone and navigation signals
Improved AM signal processing
Digital AM CQUAM stereo decoder (not in all
rom_codes available)
Digital AM interference suppression
Soft audio mute
RDS update processing: pause detection, mute and
signal-quality sensor-freeze
General purpose tone generator
(1)
Dolby
— Available only to licensees of Dolby Laboratories
Licensing Corporation, San Francisco, CA94111, USA, from
whom licensing and application information must be obtained.
Dolby is a registered trade-mark of Dolby Laboratories
Licensing Corporation.
2001 Mar 05
3
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
Noise generator allows for frequency response
measurements
Boot-up ROM for fast start-up
Signal level, noise and multipath detection for AM or FM
signal quality information
AM co-channel and adjacent channel detection (not in
all rom_codes available).
2
APPLICATIONS
RDS-demodulation
SAA7706H
FM and AM weak signal processing (soft mute, sliding
stereo and high cut)
Dolby-B tape noise reduction
CD de-emphasis function
Audio controls for volume, balance, fader, tone and
dynamics compression.
Some functions have been implemented in hardware
(FM stereo decoder, RDS-demodulator and
FM Interference Absorption Circuit (IAC) and are not freely
programmable.
Digital audio signals from external sources with the Philips
I
2
S-bus and the LSB-justified 16, 18, 20 and 24 bits format
or SPDIF format are accepted.
The big advantage of this SAA7706H device is the ‘dual
media support’; this enables independent front seat and
rear seat audio sources and control.
High-end car radio systems.
3
GENERAL DESCRIPTION
The SAA7706H performs all the signal functions in front of
the power amplifiers and behind the car radio tuner
AM and FM outputs and the CD, tape and phone inputs.
These functions are:
Interference absorption
Stereo decoding for FM and AM (stereo)
4
QUICK REFERENCE DATA
SYMBOL
Supplies
V
DD
I
DDD
I
DDA
P
tot
FM_MPX input
V
i(con)(max)(rms)
THD
maximum conversion input level
(RMS value)
total harmonic distortion
operating supply voltage
supply current of the digital part
supply current of the analog part
total power dissipation
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
all V
DD
pins with respect
to V
SS
DSP1 at 50 MHz; DSP2
at 62.9 MHz
zero input and output
signal
DSP1 at 50 MHz; DSP2
at 62.9 MHz
3
3.3
110
40
540
3.6
150
60
750
V
mA
mA
mW
THD < 1%;
VOLFM = 00H
input signal 0.368 V
(RMS) at 1 kHz;
bandwidth = 19 kHz;
VOLFM = 00H
0.33
0.368
−70
0.03
−65
0.056
V
dB
%
S/N
signal-to-noise ratio input stereo
input signal at 1 kHz;
75
bandwidth = 40 kHz;
0 dB reference = 0.368 V
(RMS); VOLFM = 00H
81
dB
CD, TAPE, AUX and AM inputs
V
i(con)(max)(rms)
maximum conversion input level
(RMS value)
THD < 1%
0.6
0.66
V
2001 Mar 05
4
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
SAA7706H
SYMBOL
THD
PARAMETER
total harmonic distortion
CONDITIONS
input signal 0.55 V
(RMS) at 1 kHz;
bandwidth = 20 kHz
input signal at 1 kHz;
bandwidth = 20 kHz;
0 dB reference = 0.55 V
(RMS)
MIN.
TYP.
−85
MAX.
−75
UNIT
dB
S/N
signal-to-noise ratio
85
90
dB
FSDAC
(THD + N)/S
total harmonic distortion-plus-noise to at 0 dB
signal ratio (measured with system
at
−60
dB; A-weighted
one)
signal-to-noise ratio (measured with
system one)
code = 0; A-weighted
−90
−37
105
−85
dB
dB
dB
S/N
Crystal oscillator
f
xtal
5
crystal frequency
ORDERING INFORMATION
TYPE
NUMBER
SAA7706H
PACKAGE
NAME
QFP80
DESCRIPTION
plastic quad flat package; 80 leads (lead length 1.95 mm);
body 14
×
20
×
2.8 mm
VERSION
SOT318-2
11.2896
MHz
2001 Mar 05
5
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