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935272003115

8 I/O, PIA-GENERAL PURPOSE, PQCC16, 4 X 4 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT629-1, HVQFN-16

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

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器件参数
参数名称
属性值
厂商名称
NXP(恩智浦)
包装说明
4 X 4 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT629-1, HVQFN-16
Reach Compliance Code
unknown
ECCN代码
EAR99
JESD-30 代码
S-PQCC-N16
长度
4 mm
I/O 线路数量
8
端口数量
1
端子数量
16
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
HVQCCN
封装形状
SQUARE
封装形式
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度
1 mm
最大供电电压
5.5 V
最小供电电压
2.3 V
标称供电电压
3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
NO LEAD
端子节距
0.65 mm
端子位置
QUAD
宽度
4 mm
uPs/uCs/外围集成电路类型
PARALLEL IO PORT, GENERAL PURPOSE
文档预览
PCA9554; PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
Rev. 9 — 19 March 2013
Product data sheet
1. General description
The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General
Purpose parallel Input/Output (GPIO) expansion for I
2
C-bus/SMBus applications and
were developed to enhance the NXP Semiconductors family of I
2
C-bus I/O expanders.
The improvements include higher drive capability, 5 V I/O tolerance, lower supply current,
individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O
expanders provide a simple solution when additional I/O is needed for ACPI power
switches, sensors, push buttons, LEDs, fans, and so on.
The PCA9554/PCA9554A consist of an 8-bit Configuration register (Input or Output
selection); 8-bit Input Port register, 8-bit Output Port register and an 8-bit Polarity
Inversion register (active HIGH or active LOW operation). The system master can enable
the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for
each input or output is kept in the corresponding Input Port or Output Port register. The
polarity of the read register can be inverted with the Polarity Inversion register. All
registers can be read by the system master. Although pin-to-pin and I
2
C-bus address
compatible with the PCF8574 series, software changes are required due to the
enhancements and are discussed in
Application Note AN469.
The PCA9554/PCA9554A open-drain interrupt output is activated when any input state
differs from its corresponding Input Port register state and is used to indicate to the
system master that an input state has changed. The power-on reset sets the registers to
their default values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I
2
C-bus address and allow up to eight
devices to share the same I
2
C-bus/SMBus. The PCA9554A is identical to the PCA9554
except that the fixed I
2
C-bus address is different allowing up to sixteen of these devices
(eight of each) on the same I
2
C-bus/SMBus.
2. Features and benefits
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant I/Os
Polarity Inversion register
Active LOW interrupt output
Low standby current
Noise filter on SCL/SDA inputs
No glitch on power-up
Internal power-on reset
8 I/O pins which default to 8 inputs
0 Hz to 400 kHz clock frequency
NXP Semiconductors
PCA9554; PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
AEC-Q100 compliance available
Packages offered: SO16, SSOP16, SSOP20, TSSOP16, HVQFN16 (2 versions:
4
4
0.85 mm and 3
3
0.85 mm), and bare die
3. Ordering information
Table 1.
Ordering information
Topside
marking
PCA9554D
PCA9554AD
9554DB
9554A
PCA9554
PA9554A
9554DH
9554DH
9554ADH
9554
554A
P54
54A
-
bare die
HVQFN16
HVQFN16
plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 4
4
0.85 mm
plastic thermal enhanced very thin quad flat package;
no leads; 16 terminals; body 3
3
0.85 mm
-
SOT629-1
SOT758-1
-
TSSOP16
SSOP20
SSOP16
Package
Name
SO16
Description
plastic small outline package; 16 leads;
body width 7.5 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic shrink small outline package; 20 leads;
body width 4.4 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Version
SOT162-1
SOT338-1
SOT266-1
SOT403-1
Type number
PCA9554D
PCA9554AD
PCA9554DB
PCA9554ADB
PCA9554TS
PCA9554ATS
PCA9554PW
PCA9554PW/Q900
[1]
PCA9554APW
PCA9554BS
PCA9554ABS
PCA9554BS3
PCA9554ABS3
PCA9554U
[1]
PCA9554PW/Q900 is AEC-Q100 compliant. Contact
i2c.support@nxp.com
for PPAP.
3.1 Ordering options
Table 2.
Ordering options
Orderable
part number
PCA9554D,112
PCA9554D,118
PCA9554AD
PCA9554AD,112
PCA9554AD,118
PCA9554DB
PCA9554DB,112
PCA9554DB,118
Package
Packing method
Minimum Temperature
order
quantity
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
Type number
PCA9554D
SO16
SO16
SO16
SO16
SSOP16
SSOP16
Standard marking *
1920
IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
1000
Standard marking *
1920
IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
1000
Standard marking *
1092
IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
2000
PCA9554_9554A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 9 — 19 March 2013
2 of 35
NXP Semiconductors
PCA9554; PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
Table 2.
Ordering options
…continued
Orderable
part number
PCA9554ADB,112
PCA9554ADB,118
Package
Packing method
Minimum Temperature
order
quantity
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
T
amb
=
40 C
to +85
C
Type number
PCA9554ADB
SSOP16
SSOP16
SSOP20
SSOP20
SSOP20
SSOP20
Standard marking *
1092
IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
2000
PCA9554TS
PCA9554TS,112
PCA9554TS,118
Standard marking *
1350
IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
2500
PCA9554ATS
PCA9554ATS,112
PCA9554ATS,118
Standard marking *
1350
IC’s tube - DSC bulk pack
Reel 13” Q1/T1
*standard mark SMD
2500
PCA9554PW
PCA9554PW,112
PCA9554PW,118
TSSOP16 Standard marking *
2400
IC’s tube - DSC bulk pack
TSSOP16 Reel 13” Q1/T1
*standard mark SMD
2500
2500
PCA9554PW/Q900 PCA9554PW/Q900,118 TSSOP16 Reel 13” Q1/T1
*standard mark SMD
PCA9554APW
PCA9554APW,112
PCA9554APW,118
PCA9554BS
PCA9554ABS
PCA9554BS3
PCA9554ABS3
PCA9554U
PCA9554BS,118
PCA9554ABS,118
PCA9554BS3,118
PCA9554ABS3,118
PCA9554U,029
TSSOP16 Standard marking *
2400
IC’s tube - DSC bulk pack
TSSOP16 Reel 13” Q1/T1
*standard mark SMD
HVQFN16 Reel 13” Q1/T1
*standard mark SMD
HVQFN16 Reel 13” Q1/T1
*standard mark SMD
HVQFN16 Reel 13” Q1/T1
*standard mark SMD
HVQFN16 Reel 13” Q1/T1
*standard mark SMD
bare die
Reel 7” Q1/T1 *no mark
die mounted on punched
tape
2500
6000
6000
6000
6000
7000
PCA9554_9554A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 9 — 19 March 2013
3 of 35
NXP Semiconductors
PCA9554; PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
4. Block diagram
PCA9554/PCA9554A
A0
A1
A2
8-bit
SCL
SDA
INPUT
FILTER
I
2
C-BUS/SMBus
CONTROL
write pulse
V
DD
POWER-ON
RESET
read pulse
INPUT/
OUTPUT
PORTS
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
V
DD
V
SS
LP
FILTER
002aac492
INT
All I/Os are set to inputs at reset.
Fig 1.
Block diagram of PCA9554/PCA9554A
PCA9554_9554A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 9 — 19 March 2013
4 of 35
NXP Semiconductors
PCA9554; PCA9554A
8-bit I
2
C-bus and SMBus I/O port with interrupt
5. Pinning information
5.1 Pinning
A0
A1
A2
IO0
IO1
IO2
IO3
V
SS
1
2
3
4
5
6
7
8
002aac486
16 V
DD
15 SDA
14 SCL
13 INT
12 IO7
11 IO6
10 IO5
9
IO4
A0
A1
A2
IO0
IO1
IO2
IO3
V
SS
1
2
3
4
5
6
7
8
002aac487
16 V
DD
15 SDA
14 SCL
13 INT
12 IO7
11 IO6
10 IO5
9
IO4
PCA9554D
PCA9554AD
PCA9554DB
PCA9554ADB
Fig 2.
Pin configuration for SO16
Fig 3.
Pin configuration for SSOP16
INT
SCL
A0
A1
A2
IO0
IO1
IO2
IO3
V
SS
1
2
3
4
5
6
7
8
002aac488
1
2
3
4
5
6
7
8
9
20 IO7
19 IO6
18 n.c.
17 IO5
16 IO4
15 V
SS
14 IO3
13 n.c.
12 IO2
11 IO1
002aac489
16 V
DD
15 SDA
14 SCL
n.c.
SDA
V
DD
A0
A1
n.c.
A2
PCA9554PW
PCA9554PW/Q900
PCA9554APW
13 INT
12 IO7
11 IO6
10 IO5
9
IO4
PCA9554TS
PCA9554ATS
IO0 10
Fig 4.
Pin configuration for TSSOP16
PCA9554BS
PCA9554ABS
13 SDA
14 V
DD
16 A1
15 A0
Fig 5.
Pin configuration for SSOP20
PCA9554BS3
PCA9554ABS3
16 A1
15 A0
terminal 1
index area
terminal 1
index area
A2
IO0
IO1
IO2
1
2
3
4
7
5
6
8
12 SCL
11 INT
10 IO7
9
IO6
A2
IO0
IO1
IO2
1
2
3
4
5
6
7
8
13 SDA
12 SCL
11 INT
10 IO7
9
IO6
IO5
V
SS
IO3
IO4
IO3
002aac490
V
SS
IO5
IO4
14 V
DD
002aac491
Transparent top view
Transparent top view
Fig 6.
Pin configuration for HVQFN16
(SOT629-1)
Fig 7.
Pin configuration for HVQFN16
(SOT758-1)
PCA9554_9554A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 9 — 19 March 2013
5 of 35
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