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935279025115

Buffer, AUP/ULP/V Series, 1-Func, 1-Input, CMOS, PDSO6

器件类别:逻辑    逻辑   

厂商名称:Nexperia

厂商官网:https://www.nexperia.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Nexperia
包装说明
VSON,
Reach Compliance Code
compliant
系列
AUP/ULP/V
JESD-30 代码
R-PDSO-N6
JESD-609代码
e3
长度
1.45 mm
逻辑集成电路类型
BUFFER
湿度敏感等级
1
功能数量
1
输入次数
1
端子数量
6
最高工作温度
125 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
VSON
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, VERY THIN PROFILE
传播延迟(tpd)
20.1 ns
座面最大高度
0.5 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
0.8 V
标称供电电压 (Vsup)
1.1 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子面层
Tin (Sn)
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
DUAL
宽度
1 mm
文档预览
74AUP1G17
Low-power Schmitt trigger
Rev. 8 — 15 January 2015
Product data sheet
1. General description
The 74AUP1G17 provides the single Schmitt trigger buffer. It is capable of transforming
slowly changing input signals into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
NXP Semiconductors
74AUP1G17
Low-power Schmitt trigger
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AUP1G17GW
74AUP1G17GM
74AUP1G17GF
74AUP1G17GN
74AUP1G17GS
74AUP1G17GX
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
TSSOP5
XSON6
XSON6
XSON6
XSON6
X2SON5
Description
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
Version
SOT353-1
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
1.45
0.5 mm
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1
1
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
X2SON5: plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8
0.8
0.35 mm
SOT1115
SOT1202
SOT1226
4. Marking
Table 2.
Marking
Marking code
[1]
pJ
pJ
pJ
pJ
pJ
pJ
Type number
74AUP1G17GW
74AUP1G17GM
74AUP1G17GF
74AUP1G17GN
74AUP1G17GS
74AUP1G17GX
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
74AUP1G17
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 15 January 2015
2 of 24
NXP Semiconductors
74AUP1G17
Low-power Schmitt trigger
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration SOT353-1
Fig 5.
Pin configuration SOT886
Fig 6.
Pin configuration SOT891, SOT1115 and
SOT1202
Fig 7.
Pin configuration SOT1226 (X2SON5)
6.2 Pin description
Table 3.
Symbol
n.c.
A
GND
Y
n.c.
V
CC
Pin description
Pin
TSSOP5 and X2SON5
1
2
3
4
-
5
XSON6
1
2
3
4
5
6
not connected
data input
ground (0 V)
data output
not connected
supply voltage
Description
74AUP1G17
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 15 January 2015
3 of 24
NXP Semiconductors
74AUP1G17
Low-power Schmitt trigger
7. Functional description
Table 4.
Input
A
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Output
Y
L
H
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
50
[1]
Max
+4.6
-
+4.6
-
+4.6
20
+50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
< 0 V
Active mode and Power-down mode
V
O
= 0 V to V
CC
0.5
-
-
50
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP5 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
Active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
0.8
0
0
0
40
Max
3.6
3.6
V
CC
3.6
+125
Unit
V
V
V
V
C
74AUP1G17
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 15 January 2015
4 of 24
NXP Semiconductors
74AUP1G17
Low-power Schmitt trigger
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= 25
C
V
OH
HIGH-level output voltage
V
I
= V
T+
or V
T
I
O
=
20 A;
V
CC
= 0.8 V to 3.6 V
I
O
=
1.1
mA; V
CC
= 1.1 V
I
O
=
1.7
mA; V
CC
= 1.4 V
I
O
=
1.9
mA; V
CC
= 1.65 V
I
O
=
2.3
mA; V
CC
= 2.3 V
I
O
=
3.1
mA; V
CC
= 2.3 V
I
O
=
2.7
mA; V
CC
= 3.0 V
I
O
=
4.0
mA; V
CC
= 3.0 V
V
OL
LOW-level output voltage
V
I
= V
T+
or V
T
I
O
= 20
A;
V
CC
= 0.8 V to 3.6 V
I
O
= 1.1 mA; V
CC
= 1.1 V
I
O
= 1.7 mA; V
CC
= 1.4 V
I
O
= 1.9 mA; V
CC
= 1.65 V
I
O
= 2.3 mA; V
CC
= 2.3 V
I
O
= 3.1 mA; V
CC
= 2.3 V
I
O
= 2.7 mA; V
CC
= 3.0 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
I
I
OFF
I
OFF
I
CC
I
CC
C
I
C
O
V
OH
input leakage current
power-off leakage current
V
I
= GND to 3.6 V; V
CC
= 0 V to 3.6 V
V
I
or V
O
= 0 V to 3.6 V; V
CC
= 0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1
1.7
0.1
0.31
0.31
0.31
0.44
0.31
0.44
0.1
0.2
0.2
0.5
40
-
-
V
V
V
V
V
V
V
A
A
A
A
A
pF
pF
0.3
V
CC
V
V
CC
0.1
0.75
V
CC
1.11
1.32
2.05
1.9
2.72
2.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
Conditions
Min
Typ
Max
Unit
additional power-off leakage V
I
or V
O
= 0 V to 3.6 V;
current
V
CC
= 0 V to 0.2 V
supply current
additional supply current
input capacitance
output capacitance
HIGH-level output voltage
V
I
= GND or V
CC
; I
O
= 0 A;
V
CC
= 0.8 V to 3.6 V
V
I
= V
CC
0.6 V; I
O
= 0 A;
V
CC
= 3.3 V
V
I
= GND or V
CC
; V
CC
= 0 V to 3.6 V
V
O
= GND; V
CC
= 0 V
V
I
= V
T+
or V
T
I
O
=
20 A;
V
CC
= 0.8 V to 3.6 V
I
O
=
1.1
mA; V
CC
= 1.1 V
I
O
=
1.7
mA; V
CC
= 1.4 V
I
O
=
1.9
mA; V
CC
= 1.65 V
I
O
=
2.3
mA; V
CC
= 2.3 V
I
O
=
3.1
mA; V
CC
= 2.3 V
I
O
=
2.7
mA; V
CC
= 3.0 V
I
O
=
4.0
mA; V
CC
= 3.0 V
T
amb
=
40 C
to +85
C
V
CC
0.1
0.7
V
CC
1.03
1.30
1.97
1.85
2.67
2.55
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
74AUP1G17
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 8 — 15 January 2015
5 of 24
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