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74HC2G32-Q100; 74HCT2G32-Q100
Dual 2-input OR gate
Rev. 2 — 6 January 2014
Product data sheet
1. General description
The 74HC2G32-Q100; 74HCT2G32-Q100 is a dual 2-input OR gate. Inputs include clamp
diodes that enable the use of current limiting resistors to interface inputs to voltages in
excess of V
CC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC2G32-Q100: CMOS level
For 74HCT2G32-Q100: TTL level
Complies with JEDEC standard no. 7A
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
Multiple package options
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
NXP Semiconductors
74HC2G32-Q100; 74HCT2G32-Q100
Dual 2-input OR gate
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74HC2G32DP-Q100
74HCT2G32DP-Q100
74HC2G32DC-Q100
74HCT2G32DC-Q100
40 C
to +125
C
VSSOP8
40 C
to +125
C
TSSOP8
Description
plastic thin shrink small outline package; 8
leads; body width 3 mm; lead length 0.5 mm
Version
SOT505-2
Type number
plastic very thin shrink small outline package; SOT765-1
8 leads; body width 2.3 mm
4. Marking
Table 2.
Marking code
Marking code
[1]
H32
T32
H32
T32
Type number
74HC2G32DP-Q100
74HCT2G32DP-Q100
74HC2G32DC-Q100
74HCT2G32DC-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
1
2
5
6
1A
1B
2A
2B
2
1Y
7
B
2Y
3
5
6
A
mna733
mna734
mna166
≥
1
7
≥
1
3
Y
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram (one gate)
74HC_HCT2G32_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 6 January 2014
2 of 14
NXP Semiconductors
74HC2G32-Q100; 74HCT2G32-Q100
Dual 2-input OR gate
6. Pinning information
6.1 Pinning
74HC2G32-Q100
74HCT2G32-Q100
1A
1B
2Y
GND
1
2
3
4
aaa-009271
8
7
6
5
V
CC
1Y
2B
2A
Fig 4.
Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)
6.2 Pin description
Table 3.
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
V
CC
Pin description
Pin
1, 5
2, 6
4
7, 3
8
Description
data input
data input
ground (0 V)
data output
supply voltage
7. Functional description
Table 4.
Input
nA
L
L
H
H
[1]
Function table
[1]
Output
nB
L
H
L
H
nY
L
H
H
H
H = HIGH voltage level; L = LOW voltage level.
74HC_HCT2G32_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 6 January 2014
3 of 14
NXP Semiconductors
74HC2G32-Q100; 74HCT2G32-Q100
Dual 2-input OR gate
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
D
[1]
[2]
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
dynamic power dissipation
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
V
O
=
0.5
V to (V
CC
+ 0.5 V)
[1]
[1]
[1]
[1]
[1]
Min
0.5
-
-
-
-
50
65
-
Max
+7.0
20
20
25
50
-
+150
300
Unit
V
mA
mA
mA
mA
mA
C
mW
T
amb
=
40 C
to +125
C
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise
and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC2G32-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT2G32-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
+25
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74HC2G32-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
74HC_HCT2G32_Q100
Conditions
Min
1.5
3.15
4.2
-
-
-
25
C
Typ
1.2
2.4
3.2
0.8
2.1
2.8
Max
-
-
-
0.5
1.35
1.8
40 C
to +85
C 40 C
to +125
C
Unit
Min
1.5
3.15
4.2
-
-
-
Max
-
-
-
0.5
1.35
1.8
Min
1.5
3.15
4.2
-
-
-
Max
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 6 January 2014
4 of 14
