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935314011557

Microcontroller

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

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器件参数
参数名称
属性值
厂商名称
NXP(恩智浦)
包装说明
,
Reach Compliance Code
unknown
uPs/uCs/外围集成电路类型
MICROCONTROLLER
Base Number Matches
1
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Freescale Semiconductor
Addendum
Document Number: QFN_Addendum
Rev. 0, 07/2014
Addendum for New QFN
Package Migration
This addendum provides the changes to the 98A case outline numbers for products covered in this book.
Case outlines were changed because of the migration from gold wire to copper wire in some packages. See
the table below for the old (gold wire) package versus the new (copper wire) package.
To view the new drawing, go to Freescale.com and search on the new 98A package number for your
device.
For more information about QFN package use, see EB806:
Electrical Connection Recommendations for
the Exposed Pad on QFN and DFN Packages.
© Freescale Semiconductor, Inc., 2014. All rights reserved.
Part Number
MC68HC908JW32
MC9S08AC16
MC9S908AC60
MC9S08AC128
MC9S08AW60
MC9S08GB60A
MC9S08GT16A
MC9S08JM16
MC9S08JM60
MC9S08LL16
MC9S08QE128
MC9S08QE32
MC9S08RG60
MCF51CN128
MC9RS08LA8
MC9S08GT16A
MC9S908QE32
MC9S908QE8
MC9S08JS16
MC9S08QB8
MC9S08QG8
MC9S08SH8
MC9RS08KB12
MC9S08QG8
MC9RS08KB12
MC9S08QG8
MC9RS08KA2
6 DFN
Package Description
48 QFN
Original (gold wire)
Current (copper wire)
package document number package document number
98ARH99048A
98ASA00466D
48 QFN
32 QFN
32 QFN
32 QFN
24 QFN
98ARL10606D
98ARH99035A
98ARE10566D
98ASA00071D
98ARL10608D
98ASA00466D
98ASA00473D
98ASA00473D
98ASA00736D
98ASA00734D
24 QFN
24 QFN
24 QFN
16 QFN
8 DFN
98ARL10605D
98ARE10714D
98ASA00087D
98ARE10614D
98ARL10557D
98ASA00474D
98ASA00474D
98ASA00602D
98ASA00671D
98ASA00672D
98ARL10602D
98ASA00735D
Addendum for New QFN Package Migration, Rev. 0
2
Freescale Semiconductor
MC9S08AC60
MC9S08AC48
MC9S08AC32
Data Sheet
HCS08
Microcontrollers
MC9S08AC60
Rev. 3
8/2011
freescale.com
MC9S08AC60 Series Features
8-Bit HCS08 Central Processor Unit (CPU)
40-MHz HCS08 CPU (central processor unit)
20-MHz internal bus frequency
HC08 instruction set with added BGND instruction
Background debugging system
Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two more
breakpoints in on-chip debug module)
On-chip in-circuit emulator (ICE) Debug module
containing two comparators and nine trigger
modes. Eight deep FIFO for storing
change-of-flow addresses and event-only data.
Supports both tag and force breakpoints.
Support for up to 32 interrupt/reset sources
Up to 60 KB of on-chip FLASH memory with
security options
Up to 2 KB of on-chip RAM
Clock source options include crystal, resonator,
external clock, or internally generated clock with
precision NVM trimming using ICG module
Optional watchdog computer operating properly
(COP) reset with option to run from independent
1kHz internal clock source or bus clock
Low-voltage detection with reset or interrupt
Illegal opcode detection with reset
Cyclic Redundancy Check (CRC) Module to
support fast cyclic redundancy checks on
memory.
Wait plus two stops
Peripherals
ADC
— Up to 16-channel, 10-bit analog-to-digital
converter with automatic compare function
SCI
— Two serial communications interface
modules with optional 13-bit break. supports LIN
2.0 Protocol and SAE J2602; Master extended
break generation; Slave extended break detection
SPI
— Serial peripheral interface module
IIC
— Inter-integrated circuit bus module to
operate at up to 100 kbps with maximum bus
loading; capable of higher baudrates with reduced
loading. 10-bit address extension option.
Timers
— Up to two 2-channel and one 6-channel
16-bit timer/pulse-width modulator (TPM) module:
Selectable input capture, output compare, and
edge-aligned PWM capability on each channel.
Each timer module may be configured for
buffered, centered PWM (CPWM) on all channels
KBI
— Up to 8-pin keyboard interrupt module
CRC
- Hardware CRC generation using a 16-bit
shift register
Up to 54 general-purpose input/output (I/O) pins
Software selectable pullups on ports when used
as inputs
Software selectable slew rate control on ports
when used as outputs
Software selectable drive strength on ports when
used as outputs
Master reset pin and power-on reset (POR)
Internal pullup on RESET, IRQ, and BKGD/MS
pins to reduce customer system cost
64-pin quad flat package (QFP)
64-pin low-profile quad flat package (
LQFP
)
48-pin quad flat pack no lead package (QFN)
44-pin low-profile quad flat package (LQFP)
32-pin low-profile quad flat package (LQFP)
Development Support
Memory Options
Clock Source Options
Input/Output
System Protection
Package Options
Power-Saving Modes
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