Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MPC5606S
Rev. 8, 11/2011
MPC5606S
MPC5606S Microcontroller
Data Sheet
LQFP144 (20 x 20 mm)
LQFP176 (24 x 24 mm)
• Single issue, 32-bit Power Architecture Book E compliant
CPU core complex (e200z0h)
– Compatible with classic PowerPC instruction set
– Includes variable length encoding (VLE) instruction set
for smaller code size footprint; with the encoding of
mixed 16-bit and 32-bit instructions, it is possible to
achieve significant code size footprint reduction over
conventional Book E compliant code
• On-chip ECC flash memory with flash controller
– Up to 1 MB primary flash—two 512 KB modules with
prefetch buffer and 128-bit data access port
– 64 KB data flash—separate 4
16 KB flash block for
EEPROM emulation with prefetch buffer and 128-bit
data access port
• Up to 48 KB on-chip ECC SRAM with SRAM controller
• Up to 160 KB on-chip non-ECC graphics SRAM with
SRAM controller
• Memory Protection Unit (MPU) with up to 12 region
descriptors and 32-byte region granularity to provide basic
memory access permission
• Interrupt Controller (INTC) with up to 127 peripheral
interrupt sources and eight software interrupts
• 2 Frequency-Modulated Phase-Locked Loops (FMPLLs)
– Primary FMPLL provides a 64 MHz system clock
– Auxiliary FMPLL is available for use as an alternate,
modulated or non-modulated clock source to eMIOS
modules and as alternate clock to the DCU for pixel
clock generation
• Crossbar switch architecture enables concurrent access of
peripherals, flash memory, or RAM from multiple bus
masters (AMBA 2.0 v6 AHB)
• 16-channel Enhanced Direct Memory Access controller
(eDMA) with multiple transfer request sources using a
DMA channel multiplexer
• Boot Assist Module (BAM) supports internal flash
programming via a serial link (FlexCAN or LINFlex)
• Display Control Unit to drive TFT LCD displays
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– Includes processing of up to four planes that can be
blended together
– Offers a direct unbuffered hardware bit-blitter of up to
16 software-configurable dynamic layers in order to
drastically minimize graphic memory requirements and
provide fast animations
– Programmable display resolutions are available up to
WVGA
Parallel Data Interface (PDI) for digital video input
LCD segment driver module with two software
programmable configurations:
– Up to 40 frontplane drivers and 4 backplane drivers
– Up to 38 frontplane drivers and 6 backplane drivers
Stepper Motor Controller (SMC) module with high-current
drivers for up to six instrument cluster gauges driven in full
dual H-Bridge configuration including full diagnostics for
short circuit detection
Stepper motor return-to-zero and stall detection module
Sound generation and playback utilizing PWM channels
and eDMA; supports monotonic and polyphonic sound
24 eMIOS channels providing up to 16 PWM and 24 input
capture / output compare channels
10-bit Analog-to-Digital Converter (ADC)
– Maximum conversion time of 1
s
– Up to 16 internal channels, expandable to 23 via external
multiplexing
Up to 2 Deserial Serial Peripheral Interface (DSPI)
modules for full-duplex, synchronous communications
with external devices (extendable to include up to 8
multiplexed external channels)
QuadSPI serial flash memory controller supporting single,
dual, and quad modes of operation to interface to external
serial flash memory; QuadSPI can be configured to
function as another DSPI module (MPC5606S only)
2 Local Interconnect Network Flexible (LINFlex)
controller modules capable of autonomous message
handling (master), autonomous header handling (slave
© Freescale Semiconductor, Inc., 2008–2011. All rights reserved.
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mode), and UART support; compliant with LIN protocol
rev 2.1
2 full CAN 2.0B controllers with 64 configurable buffers
each; bit rate programmable up to 1 Mbit/s
Up to 4 Inter-integrated circuit (I
2
C) internal bus
controllers with master/slave bus interface
Up to 133 configurable general purpose pins supporting
input and output operations
Real Time Counter (RTC) with multiple clock sources:
– 128 kHz slow internal RC oscillator or 16 MHz fast
internal RC oscillator supporting autonomous wakeup
with 1 ms resolution with maximum timeout of 2
seconds
– 32 kHz slow external crystal oscillator, supporting
wakeup with 1 s resolution and maximum timeout of
one hour
– 4–16 MHz fast external crystal oscillator
System timers:
– 4-channel 32-bit System Timer Module
(STM)—included in processor platform
– 4-channel 32-bit Periodic Interrupt Timer (PIT) module
– Software Watchdog Timer (SWT)
System Integration Unit (SIU) module to manage resets,
external interrupts, GPIO, and pad control
System Status and Configuration Module (SSCM) to
provide information for identification of the device, last
boot mode, or debug status, and provides an entry point for
the censorship password mechanism
Clock Generation Module (MC_CGM) to generate system
clock sources and provide a unified register interface,
enabling access to all clock sources
• Clock Monitor Unit (CMU) to monitor the integrity of the
main crystal oscillator and the PLL and act as a frequency
meter, measuring the frequency of one clock source and
comparing it to a reference clock
• Mode Entry Module (MC_ME) to control the device
power mode, in other words, Run, Halt, Stop, or Standby
control mode transition sequences, and manage the power
control, voltage regulator, clock generation, and clock
management modules
• Reset Generation Module (MC_RGM) to manage reset
assertion and release to the device at initial startup
• Nexus development interface (NDI) per IEEE-ISTO
5001-2003 Class Two Plus standard
• Device/board boundary-scan testing supported per Joint
Test Action Group (JTAG) of IEEE (IEEE 1149.1)
• On-chip voltage regulator controller for regulating the 3.3
or 5 V supply voltage down to 1.2 V for core logic
(requires external ballast transistor)
• The MPC5606S microcontrollers are offered in the
following packages:
1
– 144 LQFP, 0.5 mm pitch, 20 mm
20 mm outline
– 176 LQFP, 0.5 mm pitch, 24 mm
24 mm outline
– 208 MAPBGA, 1.0 mm pitch, 17 mm
17 mm outline
(not a production package; available in limited
quantities for tool development only)
1. See the device comparison table or orderable parts
summary for package offerings for each device in the family.
MPC5606S Microcontroller Data Sheet, Rev. 8
2
Freescale Semiconductor
Table of Contents
1
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1 Document overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.3 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.4 MPC5606S series blocks . . . . . . . . . . . . . . . . . . . . . . . .5
1.5 Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Pinout and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . .23
2.1 144 LQFP package pinouts . . . . . . . . . . . . . . . . . . . . .23
2.2 176 LQFP package pinout . . . . . . . . . . . . . . . . . . . . . .27
2.3 208 MAPBGA package ballmap . . . . . . . . . . . . . . . . . .28
2.4 Pad configuration during reset phases . . . . . . . . . . . . .29
2.5 Voltage supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
2.6 Pad types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
2.7 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
2.8 Debug pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
2.9 Port pin summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
3.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . .55
3.3 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
3.4 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .56
3.5 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .61
3.6 Electromagnetic compatibility (EMC) characteristics . .63
3.7 Power management electrical characteristics. . . . . . . .65
I/O pad electrical characteristics . . . . . . . . . . . . . . . . . 74
SSD specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
RESET electrical characteristics . . . . . . . . . . . . . . . . . 83
Fast external crystal oscillator (4–16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
3.12 Slow external crystal oscillator (32 KHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
3.13 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . 90
3.14 Fast internal RC oscillator (16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
3.15 Slow internal RC oscillator (128 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
3.16 Flash memory electrical characteristics . . . . . . . . . . . 92
3.17 ADC electrical characteristics . . . . . . . . . . . . . . . . . . . 93
3.18 LCD driver electrical characteristics . . . . . . . . . . . . . 100
3.19 Pad AC specifications . . . . . . . . . . . . . . . . . . . . . . . . 100
3.20 AC timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.1 144 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.2 176 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
3.8
3.9
3.10
3.11
2
3
4
5
6
MPC5606S Microcontroller Data Sheet, Rev. 8
3
Freescale Semiconductor
Overview
1
1.1
Overview
Document overview
This document describes the device features and highlights important electrical and physical characteristics. For functional
characteristics, see the
MPC5606S Microcontroller Reference Manual.
1.2
Description
The MPC5606S family of chips is designed to enable the development of automotive instrument cluster applications by
providing a single-chip solution capable of hosting real-time applications and driving a TFT display directly using an on-chip
color TFT display controller.
MPC5606S chips incorporate a cost-efficient host processor core compliant with the Power Architecture
®
embedded category.
The processor is 100% user-mode compatible with the Power Architecture and capitalizes on the available development
infrastructure of current Power Architecture devices with full support from available software drivers, operating systems and
configuration code to assist with users' implementations.
Offering high performance processing at speeds up to 64 MHz, the MPC5606S family is optimized for low power consumption
and supports a range of on-chip SRAM and internal flash memory sizes. The version with 1 MB of flash memory (MPC5606S)
features 160 KB of on-chip graphics SRAM.
See
Table 1
for specific memory and feature sets of the product family members.
1.3
Device comparison
Table 1. MPC5606S family device comparison
Feature
CPU
Execution speed
Flash memory (ECC)
EEPROM Emulation Block (ECC)
RAM (ECC)
Graphics RAM
MPU
eDMA
Display Control Unit (DCU)
Parallel Data Interface
Stepper Motor Controller (SMC)
Stepper Stall Detect (SSD)
Sound Generation Logic (SGL)
LCD driver
32 KHz slow external crystal
oscillator
No
No
24 KB
No
256 KB
MPC5602S
MPC5604S
e200z0h
Static – 64 MHz
512 KB
4 × 16 KB
48 KB
No
12 entry
16 channels
No
No
6 motors
Yes
Yes
40 × 4, 38 × 6
1
Yes
Yes
Yes
48 KB
160 KB
1 MB
MPC5606S
MPC5606S Microcontroller Data Sheet, Rev. 8
4
Freescale Semiconductor
Overview
Table 1. MPC5606S family device comparison (continued)
Feature
Real-Time Counter and
Autonomous Periodic Interrupt
Periodic Interrupt Timer (PIT)
Software Watchdog Timer (SWT)
System Timer Module (STM)
Timed I/O
2
MPC5602S
Yes
MPC5604S
Yes
4 ch, 32-bit
Yes
4 ch, 32-bit
8 ch, 16-bit IC/OC
16 ch, 16-bit OPWM/IC/OC
3
ADC
4
CAN (64 mailboxes)
CAN sampler
SCI
SPI
QuadSPI serial flash interface
I
2
C
GPIO
Debug
Package
2 × DSPI
No
2
105
Nexus 1
144 LQFP
1 × FlexCAN
16 channels, 10-bit
2 × FlexCAN
Yes
2 × LINFlex
2 × DSPI
No
2
105
Nexus 1
144 LQFP
3
5
× DSPI
Yes
4
105 (144-pin package)
133 (176-pin package)
Nexus 2+
6
144 LQFP
7
176 LQFP
208 MAPBGA
8
2 × FlexCAN
MPC5606S
Yes
1
2
3
4
5
6
7
8
Configuration is software-programmable.
IC-Input Capture, OC-Output Compare, OPWM-Output Pulse Width Modulation.
This functionality is split over two eMIOS blocks.
Support for external multiplexer enabling up to 23 channels.
QuadSPI serial Flash controller can be optionally used as a third DSPI.
Nexus2+ available on 176 LQFP as alternate pin function and on 208 MAPBGA.
Not all features are available simultaneously in 144 LQFP package option.
The 208-pin package is not a production package; it is available in limited quantities for tool development only.
1.4
1.4.1
MPC5606S series blocks
Block diagram
Figure 1
shows a high-level block diagram of the MPC5606S series.
MPC5606S Microcontroller Data Sheet, Rev. 8
Freescale Semiconductor
5
