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器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

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器件参数
参数名称
属性值
厂商名称
NXP(恩智浦)
包装说明
,
Reach Compliance Code
unknown
uPs/uCs/外围集成电路类型
MICROCONTROLLER
Base Number Matches
1
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NXP Semiconductors
Data Sheet: Technical Data
An Energy Efficient Solution by NXP
Document Number: MC9S08QL8
Rev. 1, 07/2018
MC9S08QL8 Series
Covers: MC9S08QL8 and
MC9S08QL4
Features
• 8-Bit HCS08 Central Processor Unit (CPU)
– Up to 20 MHz CPU at 3.6 V to 1.8 V across temperature
range of –40 °C to 85 °C
– HC08 instruction set with added BGND instruction
– Support for up to 32 interrupt/reset sources
• On-Chip Memory
– Up to 8 KB flash memory read/program/erase over full
operating voltage and temperature
– Up to 512 bytes random-access memory (RAM)
– Security circuitry to prevent unauthorized access to
RAM and flash contents
• Power-Saving Modes
– Two very low power stop modes
– Peripheral clock enable register can disable clocks to
unused modules, thereby reducing currents
– Low power run
– Low power wait
– 6
s
typical wakeup time from stop3 mode
– Typical stop current of 250 nA at 3 V, 25 °C
• Clock Source Options
– Oscillator (XOSC) — Very low-power, loop-control
Pierce oscillator; crystal or ceramic resonator range of
31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal reference; precision trimming of
internal reference allows 0.2% resolution and 2%
deviation over temperature and voltage; supports bus
frequencies from 1 MHz to 10 MHz
• System Protection
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal clock
source or bus clock
– Low-voltage detection with reset or interrupt; selectable
trip points
– Illegal opcode detection with reset
– Illegal address detection with reset
– Flash block protection
MC9S08QL8
20-Pin TSSOP
Case 948E
16-Pin TSSOP
Case 948F
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
– ADC — 8-channel, 12-bit resolution; 2.5
s
conversion
time; automatic compare function; 1.7 mV/°C
temperature sensor; internal bandgap reference channel;
operation in stop3; fully functional from 3.6 V to 1.8 V.
– ACMP — Analog comparator with selectable interrupt
on rising, falling, or either edge of comparator output;
compare option to fixed internal bandgap reference
voltage; output can be tied internally to TPM input
capture; operation in stop3
– TPM — One 1-channel timer/pulse-width modulator
(TPM) module; selectable input capture, output
compare, or buffered edge- or center-aligned PWM on
each channel; ACMP output can be tied internally to
input capture
– MTIM — 8-bit modulo timer module with optional
prescaler
– RTC — (Real-time counter) 8-bit modulo counter with
binary or decimal based prescaler; external clock source
for precise time base, time-of-day, calendar or task
scheduling functions; free running on-chip low power
oscillator (1 kHz) for cyclic wakeup without external
components; runs in all MCU modes
– SCI — Full duplex non-return to zero (NRZ); LIN
master extended break generation; LIN slave extended
break detection; wakeup on active edge
– KBI — 8-pin keyboard interrupt with selectable edge
and level detection modes
• Input/Output
– 18 GPIOs include one input-only and one output-only
pin.
– Hysteresis and configurable pullup device on all input
pins; configurable slew rate and drive strength on all
output pins except PTA5.
• Package Options
– 20-pin TSSOP, 16-pin TSSOP
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
© 2018 NXP B.V.
All rights reserved.
Table of Contents
1.
2.
3.
4.
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . 3
MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . 7
4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2. Parameter Classification . . . . . . . . . . . . . . . . . . . 7
4.3. Absolute Maximum Ratings . . . . . . . . . . . . . . . . 7
4.4. Thermal Characteristics . . . . . . . . . . . . . . . . . . . 8
4.5. ESD Protection and Latch-Up Immunity . . . . . . . 9
4.6. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . 10
4.7. Supply Current Characteristics . . . . . . . . . . . . . 14
4.8. External Oscillator (XOSC) Characteristics . . . 15
4.9. Internal Clock Source (ICS) Characteristics . . . 17
4.10. AC Characteristics . . . . . . . . . . . . . . . . . . . . . . 19
4.10.1.Control Timing . . . . . . . . . . . . . . . . . . . . 19
4.10.2.TPM Module Timing . . . . . . . . . . . . . . .
4.11. Analog Comparator (ACMP) Electricals . . . . . .
4.12. ADC Characteristics . . . . . . . . . . . . . . . . . . . . .
4.13. Flash Specifications . . . . . . . . . . . . . . . . . . . . .
4.14. EMC Performance . . . . . . . . . . . . . . . . . . . . . .
5. Part Identification . . . . . . . . . . . . . . . . . . . . . . . . . . .
6. Package Information . . . . . . . . . . . . . . . . . . . . . . . . .
6.1. Mechanical Drawings . . . . . . . . . . . . . . . . . . . .
20
21
21
25
26
27
28
28
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://nxp.com/
The following revision history table summarizes changes contained in this document.
Rev
0
1
Date
06/12/2018
07/16/2018
Initial creation.
Added TSSOP 20 package mechanical drawing.
Description of Changes
Related Documentation
Find the most current versions of all documents at: http://www.nxp.com
Reference Manual
(MC9S08QL8RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MC9S08QL8 Series MCU Data Sheet, Rev. 1
2
NXP Semiconductors
Ordering Information
1
Ordering Information
Table 1. Ordering Information
Part Number
Max. frequency (MHz)
Flash memory (KB)
RAM (B)
12-bit ADC
ACMP
16-bit TPM
8-bit Modulo timer
RTC
SCI (LIN Capable)
KBI pins
GPIO
1
Package
1
MC9S08QL8
CTJ
20
8
512
8 ch
1
1 ch
1
Yes
1
8
18
20-TSSOP
CTG
20
8
512
8 ch
1
1 ch
1
Yes
1
8
14
16-TSSOP
CTJ
20
4
256
8 ch
1
1 ch
1
Yes
1
8
18
MC9S08QL4
CTG
20
4
256
8 ch
1
1 ch
1
Yes
1
8
14
16-TSSOP
20-TSSOP
Port I/O count includes the output-only PTA4 and the input-only PTA5 pins.
MC9S08QL8 Series MCU Data Sheet, Rev. 1
NXP Semiconductors
3
MCU Block Diagram
2
MCU Block Diagram
The block diagram shows the structure of the MC9S08QL8 MCU.
HCS08 CORE
CPU
BDC
ANALOG COMPARATOR
(ACMP)
V
REFL
/V
SSA
V
REFH
/V
DDA
12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
8-BIT MODULO TIMER
MODULE (MTIM)
REAL-TIME COUNTER
(RTC)
PTA5/IRQ/TCLK/RESET
PTA4/ACMPO/BKGD/MS
PTA3/KBIP3/ADP3
PTA2/KBIP2/ADP2
PTA1/KBIP1/ADP1/ACMP–
PTA0/KBIP0/TPMCH0/ADP0/ACMP
PTB7/EXTAL
PTB6/XTAL
PTB5/TPMCH0
PORT B
PTB4
PTB3/KBIP7/ADP7
PTB2/KBIP6/ADP6
PTB1/KBIP5/TxD/ADP5
PTB0/KBIP4/RxD/ADP4
PORT A
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
COP
IRQ
LVD
USER FLASH
(MC9S08QL8 = 8192 BYTES)
(MC9S08QL4 = 4096 BYTES)
USER RAM
(MC9S08QL8 = 512 BYTES)
(MC9S08QL4 = 256 BYTES)
16-BIT TIMER/PWM
MODULE (TPM)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI)
KEYBOARD INTERRUPT
(KBI)
PORT C
PTC3
PTC2
PTC1
PTC0
20 MHz INTERNAL CLOCK
SOURCE (ICS)
LOW-POWER OSCILLATOR
31.25 kHz to 38.4 kHz
1 MHz to 16 MHz
(XOSC)
V
SS
V
DD
VOLTAGE REGULATOR
pins not available on 16-pin package
1
V
DDA
/V
REFH
and V
SSA
/V
REFL
are double bonded to V
DD
and V
SS
Figure 1. MC9S08QL8 Series Block Diagram
MC9S08QL8 Series MCU Data Sheet, Rev. 1
4
NXP Semiconductors
Pin Assignments
3
Pin Assignments
Table 2. Pin Availability by Package Pin-Count
Pin
Number
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
2
This chapter shows the pin assignments for the MC9S08QL8 series devices.
<-- Lowest
Port Pin
PTA5
PTA4
Alt 1
IRQ
ACMPO
Priority
Alt 2
TCLK
BKGD
--> Highest
Alt 3
RESET
MS
V
DD
V
SS
Alt 4
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PTB7
PTB6
PTB5
PTB4
PTC3
PTC2
PTC1
PTC0
PTB3
PTB2
PTB1
PTB0
PTA3
PTA2
PTA1
PTA0
KBIP7
KBIP6
KBIP5
KBIP4
KBIP3
KBIP2
KBIP1
KBIP0
TPMCH0
TxD
RxD
ADP7
ADP6
ADP5
ADP4
ADP3
ADP2
ADP1
2
ADP0
2
TPMCH0
1
EXTAL
XTAL
ACMP–
2
ACMP+
2
TPMCH0 pin can be repositioned using at PTB5 TPMCH0PS in SOPT2,
default reset location is PTA0.
If ADC and ACMP are enabled, both modules will have access to the pin.
MC9S08QL8 Series MCU Data Sheet, Rev. 1
NXP Semiconductors
5
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