DATASHEET
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
ICS9FG104E
Description
The ICS9FG104E is a frequency generator that provides 4
differential HCSL output pairs. It can be used to drive PCIe
Gen1/2, SATA and USB3.0 devices. The part can use
either a 14.31818 MHz or 25 MHz crystal. The 9FG104E
can also be driven by a reference input clock instead of a
crystal. It provides outputs with cycle-to-cycle jitter of less
than 50 ps and output-to-output skew of less than 35 ps.
Features/Benefits
•
Generates common frequencies from 14.318MHz or
•
•
•
•
•
•
•
25MHz
Crystal or reference input
4 - 0.7V current-mode HCSL output pairs
Supports Serial-ATA at 100MHz
Two spread spectrum modes: -0.5% down spread and
+/-0.25% center spread; Lower EMI
31.5KHz spread modulation rate; passes USB3
compliance testing
Unused outputs may be disabled in either driven or Hi-Z
state for power manangement
I-temp version available; supports embedded
applications
Recommended Application
Frequency Generator for CPU, PCIe Gen1/2, SATA and
USB3.0
Output Features
•
4 - HCSL differential outputs
•
1 - 3.3V REF output (either 14.318M or 25M depending
on XTAL)
Key Specifications
•
•
•
•
•
Cycle to cycle jitter: < 50ps
Phase jitter: PCIe Gen1/2 <3ps rms
Output to output skew <35ps
+/-300 ppm frequency accuracy on output clocks
+/-50ppm on all output frequencies with Spread Off
Block Diagram
XIN/CLKIN
X2
2
OSC
REFOUT
PROGRAMMABLE
SPREAD PLL
STOP
LOGIC
4
DIF(3:0)
SPREAD
SEL14M_25M#
DIF_STOP#
FS(2:0)
SDATA
SCLK
CONTROL
LOGIC
IREF
IDT®
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
1
ICS9FG104E
REV D 102912
ICS9FG104E
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
Pin Configuration
XIN/CLKIN
X2
VDD
GND
REFOUT
vFS2
DIF_3
DIF_3#
VDD
GND
DIF_2
DIF_2#
SDATA
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDDA
GNDA
IREF
vFS0
vFS1
DIF_0
DIF_0#
VDD
GND
DIF_1
DIF_1#
^SEL14M_25M#
vSPREAD
DIF_STOP#
^ Pin has internal 120K pull up
v Pin has internal 120K pull down
Power Groups
Pin Number
VDD
GND
3
4
9,21
10,20
28
27
Description
REFOUT, Digital Inputs
DIF Outputs
IREF, Analog VDD, GND for PLL Core
Frequency Select Table
SEL14M_25M#
FS2 FS1 FS0 OUTPUT(MHz)
(FS3)
0
0
0
0
100.00
0
0
0
1
125.00
0
0
1
0
133.33
0
0
1
1
166.67
0
1
0
0
200.00
0
1
0
1
266.00
0
1
1
0
333.00
0
1
1
1
400.00
1
0
0
0
100.00
1
0
0
1
125.00
1
0
1
0
133.33
1
0
1
1
166.67
1
1
0
0
200.00
1
1
0
1
266.00
1
1
1
0
333.00
1
1
1
1
400.00
IDT®
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
9FG104E
2
ICS9FG104E
REV D 102912
ICS9FG104E
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
PIN NAME
XIN/CLKIN
X2
VDD
GND
REFOUT
vFS2
DIF_3
DIF_3#
VDD
GND
DIF_2
DIF_2#
SDATA
SCLK
DIF_STOP#
vSPREAD
^SEL14M_25M#
DIF_1#
DIF_1
GND
VDD
DIF_0#
DIF_0
vFS1
vFS0
IREF
GNDA
VDDA
PIN TYPE
IN
OUT
PWR
PWR
OUT
IN
OUT
OUT
PWR
PWR
OUT
OUT
I/O
IN
IN
IN
IN
OUT
OUT
PWR
PWR
OUT
OUT
IN
IN
OUT
PWR
PWR
DESCRIPTION
Crystal input or Reference Clock input
Crystal output, Nominally 14.318MHz
Power supply, nominal 3.3V
Ground pin.
Reference Clock output
Frequency select pin. This pin has an internal 120k pull down resistor
0.7V differential true clock output
0.7V differential Complementary clock output
Power supply, nominal 3.3V
Ground pin.
0.7V differential true clock output
0.7V differential Complementary clock output
Data pin for SMBus circuitry, 3.3V tolerant.
Clock pin of SMBus circuitry, 5V tolerant.
Active low input to stop differential output clocks.
Asynchronous, active high input to enable spread spectrum functionality. This pin
has a 120Kohm pull down resistor.
Select 14.31818 MHz or 25 Mhz input frequency. This pin has an internal 120kohm
pull up resistor.
1 = 14.31818 MHz, 0 = 25 MHz
0.7V differential Complementary clock output
0.7V differential true clock output
Ground pin.
Power supply, nominal 3.3V
0.7V differential Complementary clock output
0.7V differential true clock output
3.3V Frequency select latched input pin with internal 120kohm pull down resistor.
3.3V Frequency select latched input pin with internal 120kohm pull down resistor.
This pin establishes the reference current for the differential current-mode output
pairs. This pin requires a fixed precision resistor tied to ground in order to establish
the appropriate current. 475 ohms is the standard value.
Ground pin for the PLL core.
3.3V power for the PLL core.
IDT®
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
3
ICS9FG104E
REV D 102912
ICS9FG104E
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS9FG104E. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any
other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over
the recommended operating temperature range.
Symbol
Parameter
VDDxx
3.3V Supply Voltage
Ts
Storage Temperature
Tambient Ambient Operating Temp•(Commerical Grade)
Tambient Ambient Operating Temp•(Industrial Grade)
Tcase
Case Temperature
ESD prot
Input ESD protection•human body model
Min
-65
0
-40
2000
Max
4.6
150
+70
+85
115
Units
V
°
C
°C
°C
°C
V
Electrical Characteristics–REF-14.318/25 MHz
T
A
= T
A M B IENT
; V
DD
= 3.3 V +/-5%;R
S
=33
Ω,
C
L
= 5 pF (unless otherwise specified)
PARAMETER
Output High Voltage
Output Low Voltage
Rise Time
Fall Time
Duty Cycle
Jitter
Jitter
1
2
SYMBOL
V
OH
V
OL
t
r1
t
f1
d
t1
t
jcyc-cycCOM
t
jcyc-cycIND
CONDITIONS
I
OH
= -1 mA
I
OL
= 1 mA
V
OL
= 0.4 V, V
OH
= 2.4 V
V
OH
= 2.4 V, V
OL
= 0.4 V
V
T
= 1.5 V
VT = 1.5 V (commercial)
VT = 1.5 V (industrial)
MIN
2.4
1
1
45
TYP
MAX
UNITS Notes
V
V
ns
ns
%
ps
ps
1
1
1
1
1
1
1
1.4
1.4
53
87
87
0.4
2.5
2.5
55
200
250
Guaranteed by design and characterization, not 100% tested in production.
Trim capacitors must be used to tune the REF to the exact Crystal Frequency.
Electrical Characteristics–Differential Phase Jitter Parameters
PARAMETER
SYMBOL
t
jphasePLL
t
jphaseLo
t
jphaseHigh
Jitter, Phase
t
jphQPI
t
jphFBD3.2G
t
jphFBD4.8G
1
2
3
CONDITIONS
PCIe Gen 1
PCIe Gen 1/2
10kHz < f < 1.5MHz
PCIe Gen 1/2
1.5MHz < f < Nyquist (50MHz)
QPI 133MHz 4.8G/6.4Gb,12UI
FBD specs
(11 to 33MHz)
FBD specs
(11 to 33MHz)
MIN
TYP
25
0.8
1.8
0.2
1.4
1.1
MAX
86
3
3.1
0.5
3
2.5
UNITS Notes
ps (p-p)
ps
(RMS)
ps
(RMS)
ps
(RMS)
ps
(RMS)
ps
(RMS)
1,2
1,2
1,2
1,3
1
1
Guaranteed by design and characterization, not 100% tested in production.
See http://www.pcisig.com for compelte specs
First number is 4.8G link speed, second number is 6.4G link speed. From Intel Clock Jit tool
IDT®
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
4
ICS9FG104E
REV D 102912
ICS9FG104E
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
Electrical Characteristics–Input/Supply/Common Output Parameters
T
A
= T
A M B IENT
; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
Tambient
Tambient
Input High Voltage
Input Low Voltage
Input High Current
SYMBOL
T
COM
T
IND
V
IH
V
IL
I
IH
I
IL1
Input Low Current
I
IL2
IDD
VDD
Operating Supply Current IDD
VDDA
(T
A
= Commercial)
IDD
VDD
IDD
VDDA
IDD
VDDPD
IDD
VDDAPD
DIF_STOP# Current
(T
A
= Commercial)
IDD
VDDPD
IDD
VDDAPD
Operating Supply Current
(T
A
= Industrial)
IDD
VDD
IDD
VDDA
IDD
VDD
IDD
VDDA
IDD
VDDPD
IDD
VDDAPD
IDD
VDDPD
IDD
VDDAPD
F
i
L
pin
C
IN
C
OUT
T
STABcom
Clk Stabilization
1,2
T
STABind
Modulation Frequency
Modulation Frequency
DIF output enable
Input Rise and Fall times
1
2
CONDITIONS
Commericial Temperature
Industrial Temperature
3.3 V +/-5%
3.3 V +/-5%
V
IN
= V
DD
V
IN
= 0 V; Inputs with no pull-
up resistors
V
IN
= 0 V; Inputs with pull-up
resistors
C
L
=Full load; fout = 400 MHz
C
L
=Full load; fout = 100 MHz
All DIF pairs stopped in driven
mode
All DIF pairs stopped in Hi-Z
mode
C
L
=Full load; fout = 400 MHz
C
L
=Full load; fout = 100 MHz
All DIF pairs stopped in driven
mode
All DIF pairs stopped in Hi-Z
mode
SEL14M_25M# = 0
SEL14M_25M# = 1
Logic Inputs
Output pin capacitance
From V
DD
Power-Up to 1st
clock (Commercial)
From V
DD
Power-Up to 1st
clock (Industrial)
SEL14M_25M# = 0
SEL14M_25M# = 1
DIF output enable after
DIF_Stop# de-assertion
20% to 80% of VDD
MIN
0
-40
2
V
SS
- 0.3
TYP
MAX
70
85
V
DD
+ 0.3
UNITS NOTES
°C
°C
V
V
uA
uA
uA
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
1
1
1
1,2
1,2
1,3,4
1,3,4
1
1
-5
-5
-200
106
22
87
22
86
20
28
19
109
21
90
20
87
20
27
20
22.5
25.00
12.886 14.31818
1.5
0.8
5
125
25
100
25
100
25
35
25
125
25
100
25
100
25
35
25
27.5
15.75
7
5
6
1.8
3
33
33
15
5
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
MHz
MHz
nH
pF
pF
ms
ms
kHz
kHz
ns
ns
DIF_STOP# Current
(T
A
= Industrial)
Input Frequency
3
Pin Inductance
1
Input/Output
Capacitance
1
1.2
1.8
30
30
31.4
31.6
f
MOD
f
MOD
t
DIFOE
t
R
/t
F
Guaranteed by design, not 100% tested in production.
See timing diagrams for timing requirements.
3
Input frequency should be measured at the REF pin and tuned to 0 PPM to meet
ppm frequency accuracy on PLL outputs.
4
These values assume 25MHz or 14.31818MHz inputs respectively. Using a higher or lower frequency will scale
these frequencies accordingly. The output frequecy selected by the FS inputs will also scale. For example, 27MHz
input with an FS selection of 100MHz will yield an output frequency of 27/25 x 100 = 108MHz.
IDT®
FREQUENCY GENERATOR FOR PCIE GEN1/2, USB3.0, QPI & SATA
5
ICS9FG104E
REV D 102912
