ACTIVE (DIGITAL) DELAY LINES
SINGLE, DUAL, TRIPLE, QUAD DELAYS
RESISTORS CAPACITORS COILS DELAY LINES
A0 SERIES
Economical cost, prompt delivery!
Wide range of values, 5nS to 500nS
TTL Schottky interfaced
RoHS
Term.W is
RoHS
compliant
RCD
A03SAG
1 50NS
1
RCD
A04AG
100NS
Low cost solution for multiple timing delays in a single package!
RCD’s digital delay lines have been designed to provide precise fixed delays with all
the necessary drive and pick-off circuitry. All inputs and outputs are Schottky-type
and require no additional components to achieve specified delays. Designed to
meet the applicable environmental requirements of MIL-D-23859. Type A01 features
a single fixed delay, type A02 features two isolated delays, A03 features three
delays, and A04 features 4 delays (single delay SIP available). Application Guide
available.
OPTIONS
Opt.T= trailing edge design
Opt. F =fast TTL, H =HCMOS, C =FACT
Opt.A = auto-insertable design
Opt.39 = -40 to +85°C operating temp.
Tighter tolerances, faster rise times
Low power design
Military screening
PACKAGE STYLES
.500 [12.7]
Max
.015 [.4]
SIDE VIEW
SIDE
.40 [10.2]Max
.500 [12.7]
Max
8
5
↑
.
295 [7.5]
Max.
.285 [7.24]
TOP VIEW
.300±.01
[7.6±.25]
1
4
STANDARD DELAY TIMES
5nS, 10nS, 15nS, 20nS, 25nS, 50nS,
75nS, 100nS, 250nS, 500nS
Intermediate values available on special order.
↓
↑
↓
→
.300 ±.01
[7.62±.25]
.120 [3] Min
←.
100 [2.54]
.250
[6.35]
←
←
.300 [7.6]
→
←
.420 [10.67]
→
.020 [.5] .10 [2.54]
→ ←
→
PACKAGE STYLE 8P (8-Pin DIP)
PACKAGE STYLE 8SM (8-Pin SM DIP)
←
14
SPECIFICATIONS
Operating Temp: 0 to 70°C
Delay Tol: ±2nS or ±5%, whichever greater
Rise Time: 4nS
Peak Soldering Temp: +230°C
↓
↑
←
.800 [20.3] Max.
→
SIDE VIEW
↑
.
295 [7.5]
Max.
.40
[10.2]Max
.800 [20.3] Max
→
8
.285 [7.24]
TOP VIEW
1
7
↓
.120 [3] Min
.300
[7.6]
→
←
←
.300 [7.6]
→
←
.420 [10.67]
→
.015 [.4]
←
.600 ± .010
[15.2 ± .25]
→
→
←.
100 [2.54]
.300±.01
[7.6±.25]
.020 [.5]
→ ←
.10 [2.54]
CHARACTERISTICS
RCD
Type
A 01
A 01S
A 01A G
A 02A
A 02S A
A 02A G
A 03
A 03S
A 03A G
A 03S A G
A 04
A 04A G
Independent
Delays
Single
Single
Single
Dual
Dual
Dual
Triple
Triple
Triple
Triple
Quadruple
Quadruple
P a cka g e
Style
14P
8P
14S M
8S M
14P
8P
14S M
8S M
14P
8P
14S M
8S M
14P
14S M
Circuit
A
B
A
B
C
D
C
D
E
F
E
F
G
G
PACKAGE STYLE 14P (14-Pin DIP)
PACKAGE STYLE 14SM (14-Pin SM DIP)
CIRCUIT SCHEMATICS
Circuit A
14
(VCC)
Circuit B
8
(OUT)
8
(VCC)
5
(OUT)
Circuit C
14
(VCC)
12
(OUT)
8
(OUT)
Circuit D
8
(VCC)
7
(OUT)
5
(OUT)
A01SAG Single
DELAY
DELAY
DELAY
DELAY
DELAY DELAY
1
(IN)
7
(GND)
1
(IN)
4
(GND)
1
(IN)
5
(IN)
7
(GND)
1
(IN)
3
(IN)
4
(GND)
A02SAG Dual
Circuit E
14
(VCC)
12
(OUT)
10
(OUT)
8
(OUT)
Circuit F
8
(VCC)
7
(OUT)
6
(OUT)
5
(OUT)
Circuit G
14
(Vcc)
12
(OUT)
10
(OUT)
9
(OUT)
8
(OUT)
DELAY
DELAY
DELAY
DELAY DELAY DELAY
DELAY
DELAY DELAY DELAY
1
(IN)
3
(IN)
5
(IN)
7
(GND)
1
(IN)
2
(IN)
3
(IN)
4
(GND)
1
(IN)
3
(IN)
4
(IN)
5
(IN)
7
(GND)
TEST CONDITIONS @25°C
1.) Input test pulse voltage: 3.2V
2.) Input pulse width: 50nS or 1.2x the total
delay (whichever is greater)
3.) Input rise time: 2.0nS (0.75V to 2.4V)
4.) Delay measured at 1.5V on leading edge
only with no loads on output (specify opt. T
for trailing edge design)
5.) Supply Voltage (Vcc): 5V
6.) Pulse spacing: 2x pulse width minimum
P/N DESIGNATION:
A01A
Type:
A01, A01S, A01AG, etc.
Options:
T, H, F, C, A, 39 (leave blank if std.)
Delay Time:
5NS, 10NS, etc.
Packaging:
B=Bulk (Magazine tube is standard)
Termination:
W= Lead-free, Q= Tin/Lead
(leave blank if either is acceptable)
- 100NS - B W
RCD Components Inc,
520 E.Industrial Park Dr, Manchester, NH, USA 03109
rcdcomponents.com
Tel: 603
-
669
-
0054 Fax: 603
-
669
-
5455 Email:sales@rcdcomponents.com
FA077 Sale of this product is in accordance with GF-061. Specifications subject to change without notice.
108
