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ACT4487-D

ACT 4487 DUAL TRANSCEIVER FOR MIL-STD-1553/1760

器件类别:模拟混合信号IC    驱动程序和接口   

厂商名称:Aeroflex

厂商官网:http://www.aeroflex.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Aeroflex
Reach Compliance Code
unknow
Is Samacsys
N
差分输出
YES
驱动器位数
2
高电平输入电流最大值
0.00004 A
JESD-30 代码
R-MDIP-T36
JESD-609代码
e0
端子数量
36
最高工作温度
125 °C
最低工作温度
-55 °C
最小输出摆幅
6 V
最大输出低电流
0.004 A
封装主体材料
METAL
封装代码
DIP
封装等效代码
DIP36,.6
封装形状
RECTANGULAR
封装形式
IN-LINE
电源
5,+-15 V
认证状态
Not Qualified
最大接收延迟
400 ns
筛选级别
38535Q/M;38534H;883B
表面贴装
NO
技术
HYBRID
温度等级
MILITARY
端子面层
Tin/Lead (Sn/Pb)
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
Base Number Matches
1
文档预览
ACT 4487 DUAL TRANSCEIVER
FOR MIL-STD-1553/1760
Features
• +5 / ±15 Volt Supply Operation
• Low Power Dissipation
• Small Size & Light Weight
• Dual Transceivers Saves Space & Cost
• Outstanding MIL-STD-1553 performance
• Radiation Hard Dielectric Isolation Monolithic
Construction for Severe Environments
• Superior High Frequency Line Transient and
Input Ripple Rejection
• Input and Output TTL Compatible Design
• Processed and Screened to MIL-STD-883 Specs
• MIL-PRF-38534 Compliant Devices Available
• DESC SMD (Standard Military Drawing)
www.aeroflex.com/act1.htm
CIRCUIT TECHNOLOGY
General Description
The
Aeroflex
Circuit
Technology ACT 4487 is a next
generation monolithic transceiver
design
which
provides
full
compliance to MIL-STD-1553A/B
and 1760 requirements in a small
package
with
low
power
consumption.
The ACT 4487 series performs
the front-end analog function of
inputting and outputting data
through a transformer to the
MIL-STD-1553 data bus.
Design of this transceiver reflects
particular attention to active filter
performance. This results in low bit
and word error rate with superior
waveform purity and minimal zero
crossover
distortion.
Efficient
transmitter electrical and thermal
design provides low internal power
dissipation and heat rise at high as
well as low duty cycles.
Each channel of the dual
transceiver is completely separate
from
the
other
and
fully
independent. This includes power
leads as well as signal lines.
Hence, each channel may be
connected to a different data bus
with no interaction.
TX DATA OUT
TX DATA IN
DRIVER
TX DATA IN
ACTIVE
FILTER
OUTPUT
STAGE
TX DATA OUT
TX INHIBIT IN
+5V (V
L
)
+15V (V
CC
)
-15V (V
EE
)
GND1
GND2
GND3
RX DATA IN
RX DATA IN
CASE
RX STROBE IN
INPUT
AMPLIFIER
ACTIVE
FILTER
RX DATA OUT
COMP.
REFERENCE
COMP.
RX DATA OUT
Transmitter:
The Transmitter section accepts
bi-phase TTL data at the input and
when coupled to the data bus with a
1.4:1 ratio transformer, isolated on
the data bus side with two 52.5
Ohm fault isolation resistors, and
loaded
by
two
70
Ohm
Block Diagram (Without Transformer)
eroflex Circuit T
echnology
– Data Bus Modules For The Future © SCD4487D REV B 3/10/98
terminations, the data bus signal is
typically 7.5 Volts P-P at point A
(See Figure 5). When both DATA
and DATA inputs are held low or
high,
the
transmitter
output
becomes a high impedance and is
“removed” from the line. In addition,
an overriding “INHIBIT" input
provides for the removal of the
transmitter output from the line. A
logic “1” signal applied to the
“INHIBIT” takes priority over the
condition of the data inputs and
disables the transmitter (See
Transmitter
Logic
Waveform,
Figure 1). The Transmitter may be
safely operated for an indefinite
period with the bus (point A) short
circuited at 100% duty cycle.
Receiver:
The Receiver section accepts
bi-phase differential data at the
input and produces two TTL signals
at the output. The outputs are DATA
and DATA, and represent positive
and negative excursions of the input
beyond a pre-determined threshold
(See Receiver Logic Waveform,
Figure 2).
The pre-set internal thresholds
will detect data bus signals, point
A Figure 5, exceeding 1.20 Volts
P-P and reject signals less than
0.6 Volts P-P when used with a
transformer (See Figure 5 for
transformer data and typical
connection).
A low level at the RX Strobe
input inhibits the DATA and
DATA outputs. If unused, a 2K
pull-up to +5 Volts
is
recommended.
Figure 1 — Transmitter Logic Waveforms Idealized
DATA IN
DATA IN
INHIBIT
LINE TO LINE
OUTPUT
Note:
DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them,
and must be in the same state during off times (both high or low).
Figure 2 — Receiver Logic Waveforms Idealized (ACT4487D)
LINE TO LINE
INPUT
STROBE
DATA OUT
DATA OUT
Note overlap
Aeroflex Circuit Technology
2
SCD4487D REV B 3/10/98 Plainview NY (516) 694-6700
Absolute Maximum Ratings
Operating case temperature
Storage case temperature
Power supply voltage
V
CC
V
EE
V
L
Logic input voltage
Receiver differential input
Receiver input voltage (common mode)
Driver peak output current
Total package power dissipation over the full operating
case temperature rise
Maximum junction to case temperature
Thermal resistance – junction to case
-55°C to +125°C
-65°C to +150°C
-0.3 V to +18 V
+0.3 V to-18 V
-0.3 V to +7.0 V
-0.3 V to +5.5 V
±40 V
P
-
P
±10 V
300 mA
2.5 Watts
(Note: Normal operation conditions require one
transceiver on and the other off)
10°C
4°C/W
Electrical Characteristics — Driver Section
Input Characteristics, TX DATA IN or TX DATA IN (Notes 2 & 3 apply)
Parameter
"0" Input Current
"1" Input Current
"0" Input Voltage
"1" Input Voltage
Condition
V
IN
= 0.4 V
V
IN
= 2.7 V
Symbol
I
ILD
I
IHD
V
IHD
V
IHD
Min
Typ
-0.1
1
Max
-0.2
40
0.7
Unit
mA
µA
V
V
2.0
Inhibit Characteristics
"0" Input Current
"1" Input Current
"0" Input Voltage
"1" Input Voltage
Delay from TX inhibit, (0¡1) to inhibited output
Delay from TX inhibit, (1¡0) to active output
Differential output noise, inhibit mode
Differential output impedance (inhibited) Note 1 See
Figure 5
Point B
Point C
From mid pt
inhibit to
±1.2V pt B,
See Figure 5
V
IN
= 0.4 V
V
IN
=2.7V
I
ILI
I
IHI
V
ILI
V
IHI
t
DXOFF
t
DXON
V
NOI
Z
OI
Z
OI
2K
1K
2.0
175
90
2
225
150
10
-0.1
1.0
-0.2
40
0.7
mA
µA
V
V
nS
nS
mV
P-P
Output Characteristics
Differential output level, See Figure 5
See Figure 5
Rise and fall times(10% to 90% at pt A output)
See Figure 5
Output offset, Figure 3, 2.5µS after midpoint
crossing of the parity bit of the last word of a 660µS
message See Figure 5
Delay from 50% point of TX DATA or TX DATA input
to zero crossing of differential signal. See Fig 5
Aeroflex Circuit Technology
Point A
Point A
Point A
Point A
3
V
O
t
r
V
OS
t
DXT
6
100
7.5
160
9
300
± 90
V
P-P
nS
mV peak
nS
100
200
SCD4487D REV B 3/10/98 Plainview NY (516) 694-6700
Electrical Characteristics — Receiver Section
Parameter
Differential Receiver Input Voltage Range
(See Figure 5, Point B)
Common Mode Rejection Ratio (Note 3)
"1" State – Rx Data or Rx Data Output
"0" State – Rx Data or Rx Data Output
Delay (average) from Differential Input Zero
Crossings to RX DATA and RX DATA Output
50% points
Input Threshold Voltage (referred to the bus)
100KHz–1MHz
I
OH
= -0.4 mA
I
OI
= 4 mA
Condition
TXFMR
1.4:1
Symbol
V
IDR
CMRR
V
OH
V
OL
t
DXT
V
TH
Min
Typ
Max
40
Unit
V
P-P
dB
45
2.5
3.7
0.35
270
0.60
0.75
0.5
400
1.20
V
V
nS
V
P-P
Strobe Characteristics (Logic "0" Inhibits Output)
"0" Input Current
"1" Input Current
"0" Input Voltage
"1" Input Voltage
Strobe Delay (Turn-on or Turn-off)
V
S
=0.4V
V
S
=2.7V
I
IL
I
IH
V
IL
V
IH
t
SD
2.0
50
100
-0.1
1
-0.2
+40
0.7
mA
µA
V
V
nS
Power Data
Power Supply Currents – Per Channel – See Figure 4
Transmitter Standby
I
CC
I
EE
I
L
I
CC
I
EE
I
L
I
CC
I
EE
I
L
I
CC
I
EE
I
L
0
12
18
45
12
18
90
12
18
180
12
18
1
16
30
50
20
30
100
20
30
200
20
30
25% duty cycle
mA
50% duty cycle
100% duty cycle
Power Supply Voltages
±15V Operating Power Supply Voltage Range
+5V Operating Power Supply Voltage Range)
V
CC
V
EE
V
L
+14.25 +15.00 +15.75
-14.25 -15.00 -15.75
+4.50
+5.00
+5.50
V
V
Note 1. Power on or off, measured from 75KHz to 1MHz at point A and transformer self impedance of 3K
minimum
at 1MHz.
Note 2: Power Supplies: ±15 Volts ±0.75 V & +5 Volts ±0.5 V, bypassed by 10 µF (Tantalum recommended)
Capacitor minimum. All measurements & specifications apply over the temperature range of -55°C to +125°C
(case temperature) unless otherwise specified.
Note 3: When measured as shown per Figure 5 with ± 10 Volt peak, line to ground, DC to 2MHz
Note 4: Typical power is measured with V
BUS
at point A = 7.5 V
P-P
Aeroflex Circuit Technology
4
SCD4487D REV B 3/10/98 Plainview NY (516) 694-6700
Figure 3 – Transmitter (TX) Output Offset
Figure 5 – Typical 1553 Bus Connections
LAST BIT
Transformer Coupled Stub
70Ω
Magnified View
OUTPUT OFFSET
ACT 4487
*
*
TX DATA OUT
2:1
3
2
7
C
1:1.4 52.5Ω
0 Volts
OUTPUT OFFSET
A
TX DATA OUT
2.5 µsec
1
5
T1553-2
Zoi
V
CM
52.5Ω
RX DATA IN
RX DATA IN
*
Offset measured at point A in Figure 5
Direct Coupled Stub
Figure 4 – Hybrid Power Dissipation vs. Duty Cycle
(Total hybrid with one channel transmitting
and the other not powered – 100% Duty Cycle)
3600
3200
2.97W
POWER DISSIPATION
MILLIWATTS
2800
2400
2000
1600
1200
800
400
0
0
10
20
30
40
50
60
Typical Hybrid
Dissipation
Typical Hybrid Input Power
1.87W
RX DATA IN
TX DATA OUT
RX DATA IN
1
4
T1553-2
52.5Ω
Zoi
70Ω
ACT 4487
TX DATA OUT
1.4:1
3
8
2
B
52.5Ω
A
0.270
Transformer Model use Technitrol Part# 1553-2
or equivalent
70
80
90 100
DUTY CYCLE – PERCENT
Note: Vcc= +15V, V
EE
= -15V, V
L
= +5V, Transformer ratio 1.4:1,
V
BUS
(point A) at 7.5VP-P.
Configurations and Ordering Information
ACT
Model # / Ordering Part #
ACT 4487-D
ACT 4487-DI
ACT 4487-DF
ACT 4487-DFI
Specifications subject to change without notice.
Aeroflex Circuit Technology
Case
Style
DIP
DIP
FP
FP
DESC
Number
5962-8757910X_
5962-TBA
5962-8757910Y_
5962-TBA
Rx Standby
Normally Low
Normally High
Normally Low
Normally High
5
SCD4487D REV B 3/10/98 Plainview NY (516) 694-6700
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