TTL/CMOS 3.3Vdc VOLTAGE
CONTROLLED CRYSTAL OSCILLATOR
ACVX1220L
Pb
RoHS
Compliant
APPLICATIONS:
• Phase locked loops (PLLs)
• Clock recovery
• Synthesizers
• Reference signal tracking
20.2 x 12.6 x 5.03 mm
| | | | | | | | | | | | | | |
FEATURES:
• Large frequency pulling available
• Hermetically sealed
• Tight Symmetry Available
STANDARD SPECIFICATIONS:
PARAMETERS
ABRACON P/N
Frequency Range
Operating Temperature
Storage Temperature
Freq. Stability vs. Temperature
Freq. Stability vs. Aging
Freq. Stability vs. Supply Volt.
Supply Voltage (Vdd)
Supply Current (Idd)
Symmetry
Rise & Fall Time (Tr/Tf)
Output Load
Output Voltage
Transfer Function
Control Voltage (Vc)
Center Voltage
Frequency Deviation
Linearity
Start-up Time
(Left blank if standard)
ACVX1220L Series
1.0MHz to 120.0MHz
0°C to + 70°C (see options)
-40°C to + 85°C
± 100ppm max. (see options)
± 5ppm/yr max.
± 5ppm max.
3.3 Vdc ±5%
See Table 1
40/60% max. @ 1/2 Vdd (see option)
10ns max.
TTL/CMOS (15pF or 5TTL gate)
VOH=0.9*Vdd min. ; VOL=0.4*Vdd max.
Positive
0.3Vdc to 3.0Vdc
1.5 VDC
±0.25V
± 100ppm min. (see options)
± 10% max.
10ms. max.
-
-
-
-
Table 1
<=24
<=45
<=70
<=160
Freq
MHz
Idd max.
mA
25
30
60
90
OPTIONS & PART IDENTIFICATION:
ACVX1220L - Frequency -
Frequency
XXX.XXXMHz
Operating Temp.
-10°C to +60°C
D
-20°C to +70°C
E
-30°C to +70°C
F
-30°C to +85°C
N
-40°C to +85°C
L
Frequency Stability
±10ppm
Y
±20ppm
J
±25ppm
R
±30ppm
K
±35ppm
H
±50ppm
C
S
S1
N05
N15
N20
N25
N30
Symmetry
45/55%@0.5Vdd
45/55%@1.4Vdd
Trimed Lead
Gull Wing
G
0.45(11.43)
Q45
0.40(10.16)
Q40
0.35(8.89)
Q35
0.30(7.62)
Q30
0.25(6.35)
Q25
0.20(5.08)
Q20
0.15(3.81)
Q15
0.10(2.54)
Q10
Pulling
± 50ppm
± 150ppm
± 200ppm
± 250ppm
± 300ppm
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
Revised: 09.25.08
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000
|
fax 949-546-8001
| www.abracon.com
Visit www.abracon.com for Terms & Conditions of Sale
TTL/CMOS 3.3Vdc VOLTAGE
CONTROLLED CRYSTAL OSCILLATOR
ACVX1220L
Pb
RoHS
Compliant
20.2 x 12.6 x 5.03 mm
| | | | | | | | | | | | | | |
OUTLINE DRAWING:
PIN
1
7
8
14
Dimensions: Inches (mm)
FUNCTION
Vc
GND/Case
Output
VDD
Note:
It is recommended to use
an approximately 0.01uF bypass
capacitor between PIN 7 and 14.
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
Revised: 09.25.08
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000
|
fax 949-546-8001
| www.abracon.com
Visit www.abracon.com for Terms & Conditions of Sale
FPGA/CPLD
