Wednesday, Mar 12, 2008 10:27 AM /
Variable Resolution
Resolver-to-Digital
Converter
AD2S80
1.0
SCOPE
This specification documents the detail requirements for space qualified product manufactured on
Analog Devices, Inc.’s QML certified line per MIL-PRF-38535 Level V except as modified herein.
The manufacturing flow described in the STANDARD SPACE LEVEL PRODUCTS PROGRAM
brochure is to be considered a part of this specification.
http://www.analog.com/aerospace
This data sheet specifically details the space grade version of this product. A more detailed operational
description and a complete data sheet for commercial product grades can be found at
www.analog.com/AD2S80
2.0
Part Number.
The complete part number(s) of this specification follow:
Part Number
Description
AD2S80-703D
Variable Resolution Resolver-to-Digital Converter
2.1
Case Outline.
Letter Descriptive designator
Case Outline (Lead Finish per MIL-PRF-38535)
D
GDIP2-T40
40-Lead ceramic dual-in-line package (SIDEBRAZED)
Absolute Maximum Ratings.
(T
A
= 25°C, unless otherwise noted)
+V
S
to GND
-VS to GND
1, 2
1, 2
2
3.0
...............................................................................................................+14V
................................................................................................................-14V
2
+VL to GND ...................................................................................................................+VS
Digital Input Voltage to GND .......................................................................... -0.4V to +V
L
Demod I/P ...........................................................................................................+14V to -VS
Integrator I/P........................................................................................................+14V to -VS
VCO Input ..........................................................................................................+14V to -VS
VREF to GND ...............................................................................................+14V to -VS
Analog Input Voltage (SIN, COS) to GND.......................................................+14V to -VS
Power Dissipation .................................................................................................... 860mW
Storage Temperature Range.......................................................................-65°C to +150°C
Operating Temperature Range ...................................................................-55°C to +125°C
1
3, 4
2
3
4
The device should be powered up as follows: -V
S
should be applied before or simultaneously with the +V
S
.
V
L
can be applied at any time with respect to +V
S
and -V
S
.
GND refers to ANALOG GND; ANALOG GND must be externally connected to DIGITAL GND.
SIGNAL GND is internally connected to ANALOG GND.
SIN, COS, and REF input voltage may be present without +VS, -VS, or +VL.
Rev. E
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106,
U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2008 Analog Devices, Inc. All rights reserved.
ASD0011257
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its use,
nor for any infringements of patents or other rights of third parties that may
result from its use. Specifications subject to change without notice. No license
is granted by implication or otherwise under any patent or patent rights of
Analog Devices. Trademarks and registered trademarks are the property of
their respective companies.
AD2S80
3.1
Thermal Characteristics:
Thermal Resistance, D (sidebrazed) Package
Junction-to-Case (Θ
JC
) = 11°C/W Max
Junction-to-Ambient (Θ
JA
) = 48°C/W Max
3.2
Functional Block Diagram:
3.3
Terminal Assignments:
ASD0011257 Rev. E | Page 2 of 5
AD2S80
4.0
Electrical Table:
(See notes at end of table)
Table I
Parameter
Angular Accuracy 2/
Missing Codes 2/
Total effective angular offset
Integrator output range
Demod O/P Scaling 2/
VCO Maximum Rate
VCO Gain Scaling
VCO Linearity 6/
VCO Total Effective Offset
Digital Inputs High Voltage 3/
Digital Inputs Low Voltage 3/
Digital Inputs High Current 3/
Digital Inputs Low Current 3/
Digital Inputs Low Voltage 4/
Digital Inputs Low Current 4/
Digital Outputs High Voltage 5/
Digital Outputs Low Voltage 5/
High Level Three State Leakage
Current
Low level Three State Leakage
Current
Busy Pulse Width
Power Supply Current
V
IH
V
IL
I
IH
I
IL
V
IL
I
IL
V
OH
V
OL
I
OZH
I
OZL
t
BUSY
+I
S
-I
S
+I
L
Symbol
Conditions 1/
V
S
= ±10.8V, SCI=SC2=High
V
S
= ±13.2V, SC1=SC2=High
16 bit resolution
V
S
= ±10.8V, SCI=SC2=High
V
S
= ±13.2V, SC1=SC2=High
16 bit resolution
Output data nulled by application
of offset current to integrator input
1 mA load
±V
S
= 10.8V, 1 mA load
Measured with VCO input,
Current of ±10µA
VCO measured at 10 points over
the frequency range 0 to 1MHz
Measured with 68KΩ Input R
±V
S
= 10.8V
±V
S
= 13.2V
±V
S
= 13.2V, V
L
= 5.5V V
IH
=
5.5V
±V
S
= 13.2V, V
L
= 5.5V V
IL
= 0V
ENABLE
= HIGH
ENABLE
= HIGH
V
L
= 4.5V, I
OH
= 100µA
V
L
= 5.5V, I
OL
= 1.2mA
V
OH
= 5.0V, V
L
= 5.5V
Sub-
group
1, 2, 3
1
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
4, 5, 6
4, 5, 6
4, 5, 6
1, 2
3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
9, 10, 11
1, 2, 3
1, 2, 3
1, 2, 3
Limit
Min
Limit
Max
±8
±4
±6
±800
Units
Arc
mins
Codes
nA
V
±8
±7
90
7110
110
1.0
8690
±3
380
400
nA/Bit
MHz
Hz/µA
%
nA
V
2.0
0.8
±100
±100
1.0
-400
2.4
0.4
±100
±100
200
-30
1.5
600
30
µA
V
µA
V
µA
V
OL
= 0V, V
L
= 5.5V
±V
S
= ±13.2V
V
L
= 5.5V
nS
mA
TABLE I NOTES:
1/
2/
3/
4/
5/
6/
V
S
= ±12V, V
L
= +5V, unless otherwise specified
V
SIN
, V
COS
= 2 V
RMS
Maximum at 5KHz, V
REF
= 2 V
RMS
at 5KHz.
DB1-DB16,
INHIBIT
,
ENABLE
, BYTE SELECT
Digital inputs SC1, SC2, DATA LOAD are internally pulled up to +V
S
.
DB1-DB16, RIPPLE CLOCK, DIRECTION.
VCO linearity is expressed as % (percentage) of reading.
ASD0011257 Rev. E | Page 3 of 5
AD2S80
4.1
Electrical Test Requirements:
Table II
Test Requirements
Subgroups (in accordance
with MIL-PRF-38535,
Table III)
1, 4, 9
1, 2, 3, 4, 5, 6, 9, 10, 11 1/
1, 2, 3, 4, 5, 6, 9, 10, 11
1, 4, 9
1, 4, 9
Not applicable
Interim Electrical Parameters
Final Electrical Parameters
Group A Test Requirements
Group C end-point electrical parameters
Group D end-point electrical parameters
Group E end-point electrical parameters
1/
5.0
PDA applies to Subgroup 1.
Life Test/Burn-In Circuit:
5.1
HTRB is not applicable for this drawing.
5.2
Burn-in is per MIL-STD-883 Method 1015 test condition B.
5.3
Steady state life test is per MIL-STD-883 Method 1005.
ASD0011257 Rev. E | Page 4 of 5
AD2S80
Rev
A
B
C
D
E
Description of Change
Initiate
Update web address
Add subgroups 4, 5, 6, 9, 10, 11 to table II
Update web address. Delete burn-in circuit.
Update header/footer and add to 1.0 Scope description.
Date
Oct. 12, 2000
Feb. 7, 2002
Mar. 19, 2002
June 26, 2003
March 11, 2008
© 2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective
companies.
Printed in the U.S.A.
2/08
ASD0011257 Rev. E | Page 5 of 5
