a
FEATURES
Ultralow Drift: 1 V/ C (AD547L)
Low Offset Voltage: 0.25 mV (AD547L)
Low Input Bias Currents: 25 pA max
Low Quiescent Current: 1.5 mA
Low Noise: 2 V p-p
High Open Loop Gain: 110 dB
High Slew Rate: 13 V/ s
Fast Settling to 0.01%: 3 s
Low Total Harmonic Distortion: 0.0025%
Available in Hermetic Metal Can and Die Form
MIL-STD-883B Versions Available
Dual Versions Available: AD642, AD644, AD647
High Performance,
BiFET Operational Amplifiers
AD542/AD544/AD547
CONNECTION DIAGRAM
TAB
8
NULL
1
2
3
4
7
6
5
+V
INVERTING
INPUT
NONINVERTING
INPUT
OUTPUT
OBS
PRODUCT DESCRIPTION
NULL
–V
NOTE: PIN 4 CONNECTED TO CASE
The BiFET series of precision, monolithic FET-input op amps
are fabricated with the most advanced BiFET and laser trim-
ming technologies. The AD542, AD544, AD547 series offers
bias currents significantly lower than currently available BiFET
devices, 25 pA max, warmed up.
In addition, the offset voltage is laser trimmed to less than
0.25 mV on the AD547L, which is achieved by utilizing Analog
Devices’ exclusive laser wafer trimming (LWT) process. When
combined with the AD547’s low offset drift (1
µV/°C),
these
features offer the user performance superior to existing BiFET
op amps at low BiFET pricing.
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PRODUCT HIGHLIGHTS
1. Improved bipolar and JFET processing results in the lowest
bias current available in a monolithic FET op amp.
2. Analog Devices, unlike some manufacturers, specifies each
device for the maximum bias current at either input in the
warmed-up condition, thus assuring the user that the device
will meet its published specifications in actual use.
3. Advanced laser wafer trimming techniques reduce offset volt-
age drift to 1
µV/°C
max and offset voltage to only 0.25 mV
max on the AD547L.
4. Low voltage noise (2
µV
p-p) and low offset voltage drift en-
hance performance as a precision op amp.
5. High slew rate (13 V/µs) and fast settling time to 0.01% (3
µs)
make the AD544 ideal for D/A, A/D, sample-hold circuits
and high speed integrators.
6. Low harmonic distortion (0.0025%) make the AD544 an
ideal choice in audio applications.
7. Bare die are available for use in hybrid circuit applications.
The AD542 or AD547 is recommended for any operational am-
plifier application requiring excellent dc performance at low to
moderate cost. Precision instrument front ends requiring accu-
rate amplification of millivolt level signals from megohm source
impedances will benefit from the device’s excellent combination
of low offset voltage and drift, low bias current and low 1/f
noise. High common-mode rejection (80 dB, min on the “K”
and “L” grades) and high open-loop gain, even under heavy
loading, ensures better than “12-bit” linearity in high imped-
ance buffer applications.
The AD544 is recommended for any op amp applications re-
quiring excellent ac and dc performance at low cost. The
2 MHz bandwidth and low offset of the AD544 make it the first
choice as an output amplifier for current output D/A converters,
such as the AD7541, 12-bit CMOS DAC.
Devices in this series are available in four grades: the “J,” “K,”
and “L” grades are specified over the 0°C to +70°C temperature
range and the “S” grade over the –55°C to +125°C operating
temperature range. All devices are offered in the hermetically
sealed, TO-99 metal can package.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD542/AD544/AD547–SPECIFICATIONS
( V =
S
15 V @ T
A
= +25 C unless otherwise noted)
Max
Min
AD547
Typ
Max
Units
Parameter
Min
1
AD542
Typ
Max
Min
AD544
Typ
OPEN-LOOP GAIN
V
OUT
=
±
10 V, R
L
= 2 kΩ
J Grade
K, L, S Grades
T
A
= T
MIN
to T
MAX
J Grade
S Grade
K, L Grades
OUTPUT CHARACTERISTICS
R
L
= 2 kΩ
T
A
= T
MIN
to T
MAX
R
L
= 10 kΩ
T
A
= T
MIN
to T
MAX
Short Circuit Current
FREQUENCY RESPONSE
Unity Gain, Small Signal
Full Power Response
Slew Rate, Unity Gain
Total Harmonic Distortion
100
250
100
100
250
30
50
20
20
40
100
250
100
100
250
V/mV
V/mV
V/mV
V/mV
V/mV
OBS
±
12
2.0
INPUT OFFSET VOLTAGE
2
J Grade
K Grade
L Grade
S Grade
vs. Temperature
3
J Grade
K Grade
L Grade
S Grade
vs. Supply, T
A
= T
MIN
to T
MAX
J Grade
K, L, S Grades
INPUT BIAS CURRENT
4
Either Input
J Grade
K, L, S Grades
Input Offset Current
J Grade
K, L, S Grades
INPUT IMPEDANCE
Differential
Common Mode
INPUT VOLTAGE
5
Differential
Common Mode
Common-Mode Rejection
V
IN
=
±
10 V
J Grade
K, L, S Grades
5
2
±
10
±
12
±
10
±
12
±
12
±
13
25
2.0
200
13.0
0.0025
±
10
±
12
±
12
±
13
25
1.0
50
3.0
V
V
mA
MHz
kHz
V/µs
%
mV
mV
mV
mV
±
13
25
1.0
50
3.0
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8.0
2.0
2.0
1.0
0.5
1.0
2.0
1.0
0.5
1.0
1.0
0.5
0.25
0.5
20
10
5
15
20
10
5
15
5
2
1
5
µV/°C
µV/°C
µV/°C
µV/°C
µV/V
µV/V
200
100
200
100
200
100
50
25
15
15
10
5
2
10
12
6
10
12
3
±
20
±
12
50
25
15
15
10
5
2
10
12
6
10
12
3
±
20
±
12
50
25
15
15
pA
pA
pA
pA
Ω
pF
Ω
pF
V
V
10
10
12
6
10
12
3
±
20
±
12
±
10
76
80
±
10
76
80
±
10
76
80
dB
dB
–2–
REV. B
AD542/AD544/AD547
Parameter
Min
AD542
Typ
Max
Min
AD544
Typ
Max
Min
AD547
Typ
Max
Units
POWER SUPPLY
Rated Performance
Operating
Quiescent Current
VOLTAGE NOISE
0.1 Hz to 10 Hz
J Grade
K, L, S Grades
10 Hz
100 Hz
1 kHz
10 kHz
±
5
±
15
1.1
±
18
1.5
±
5
±
15
1.8
±
18
2.5
±
5
±
15
1.1
±
18
1.5
V
V
mA
OBS
TEMPERATURE RANGE
Operating, Rated Performance
J, K, L Grades
S Grade
Storage
TRANSISTOR COUNT
29
Model
Initial
Offset
Voltage
2.0
2.0
70
45
30
25
2.0
2.0
35
22
18
16
2.0
4.0
70
45
30
25
µV
p-p
µV
p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
0 to +70
–55 to +125
–65 to +150
NOTES
1
Open-Loop Gain is specified with V
OS
both nulled and unnulled.
2
Input Offset Voltage specifications are guaranteed after 5 minutes of operation at T
A
= +25°C.
3
Input Offset Voltage Drift is specified with the offset voltage unnulled. Nulling will induce an additional 3
µV/°C/mV
of nulled offset.
4
Bias Current specifications are guaranteed at either input after 5 minutes of operation at T
A
= +25°C. For higher temperatures, the current doubles every 10°C.
5
Defined as the maximum safe voltage between inputs, such that neither exceeds
±
10 V from ground.
Specifications subject to change without notice.
Specifications shown in
boldface
are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
All min and max specifications are guaranteed, although only those shown in
boldface
are tested on all production units.
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29
29
ORDERING GUIDE
Settling Time
to 0.012% for
a 10 V Step
Package
Description
0 to +70
–55 to +125
–65 to +150
0 to +70
–55 to +125
–65 to +150
°C
°C
°C
Offset
Voltage
Drift
Package
Option
AD542JCHIPS
AD542JH
AD542KH
AD542LH
AD542SH
AD542SH/883B
AD544JH
AD544KH
AD544LH
AD544SH
AD544SH/883B
AD547JH
AD547KH
AD547LH
AD547SCHIPS
AD547SH/883B
2.0 mV
2.0 mV
1.0 mV
0.5 mV
1.0 mV
1.0 mV
2.0 mV
1.0 mV
0.5 mV
1.0 mV
1.0 mV
1.0 mV
0.5 mV
0.25 mV
0.5 mV
0.5 mV
20
µV/°C
20
µV/°C
10
µV/°C
5
µV/°C
15
µV/°C
15
µV/°C
20
µV/°C
10
µV/°C
5
µV/°C
15
µV/°C
15
µV/°C
5
µV/°C
2
µV/°C
1
µV/°C
5
µV/°C
5
µV/°C
5
µs
5
µs
5
µs
5
µs
5
µs
5
µs
3
µs
3
µs
3
µs
3
µs
3
µs
5
µs
5
µs
5
µs
5
µs
5
µs
Bare Die
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
8-Pin Hermetic Metal Can
Bare Die
8-Pin Hermetic Metal Can
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
H-08A
REV. B
–3–
AD542/AD544/AD547–Typical Characteristics
OBS
Figure 1. Input Voltage Range vs.
Supply Voltage
Figure 4. Input Bias Current vs.
Supply Voltage
Figure 2. Output Voltage Swing vs.
Supply Voltage
Figure 3. Output Voltage Swing vs.
Load Resistance
Figure 5. Input Bias Current vs.
Temperature
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Figure 6. Input Bias Current vs.
CMV
Figure 9. Open Loop Frequency
Response
Figure 7. Change in Offset Voltage
vs. Warm-Up Time
Figure 8. Open Loop Gain vs.
Temperature
–4–
REV. B
AD542/AD544/AD547
OBS
Figure 10. Open Loop Voltage
Gain vs. Supply Voltage
Figure 13. Quiescent Current vs.
Supply Voltage
Figure 11. Power Supply Rejection
vs. Frequency
Figure 12. Common-Mode Rejection
Ratio vs. Frequency
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Figure 14. Large Signal Frequency
Response
Figure 17. Input Noise Voltage
Spectral Density
Figure 15. AD544 Output Swing and
Error vs. Settling Time
Figure 16. AD544 Total Harmonic
Distortion vs. Frequency
Figure 18. Total RMS Noise vs.
Source Resistance
REV. B
–5–
