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AD574ATD/833B

ADC, Successive Approximation

器件类别:模拟混合信号IC    转换器   

厂商名称:ADI(亚德诺半导体)

厂商官网:https://www.analog.com

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器件参数
参数名称
属性值
厂商名称
ADI(亚德诺半导体)
包装说明
DIP,
Reach Compliance Code
compliant
最大模拟输入电压
10 V
最小模拟输入电压
-10 V
最长转换时间
32000 µs
转换器类型
ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码
R-CDIP-T28
长度
35.81 mm
最大线性误差 (EL)
0.0122%
标称负供电电压
-12 V
模拟输入通道数量
1
位数
12
功能数量
1
端子数量
28
最高工作温度
125 °C
最低工作温度
-55 °C
输出位码
BINARY
输出格式
PARALLEL
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
采样并保持/跟踪并保持
SAMPLE
筛选级别
MIL-STD-883
座面最大高度
3.43 mm
标称供电电压
12 V
表面贴装
NO
温度等级
MILITARY
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
宽度
15.24 mm
文档预览
AD574A* Product Page Quick Links
Last Content Update: 11/01/2016
Comparable Parts
View a parametric search of comparable parts
Design Resources
AD574A Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
Documentation
Data Sheet
• AD574A: Complete 12-Bit A/D Converter Data Sheet
• AD574A: Military Data Sheet
Discussions
View all AD574A EngineerZone Discussions
Software and Systems Requirements
• JAN to Generic Cross Reference
Sample and Buy
Visit the product page to see pricing options
Reference Materials
Technical Articles
• MS-2210: Designing Power Supplies for High Speed ADC
Technical Support
Submit a technical question or find your regional support
number
* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to
the content on this page does not constitute a change to the revision number of the product data sheet. This content may be
frequently modified.
AD574A–SPECIFICATIONS
Model
RESOLUTION
LINEARITY ERROR @ +25°C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum Resolution for Which No
Missing Codes are Guaranteed)
T
MIN
to T
MAX
UNIPOLAR OFFSET (Adjustable to Zero)
BIPOLAR OFFSET (Adjustable to Zero)
FULL-SCALE CALIBRATION ERROR
(With Fixed 50
Resistor from REF OUT to REF IN)
(Adjustable to Zero)
TEMPERATURE RANGE
TEMPERATURE COEFFICIENTS
(Using Internal Reference)
T
MIN
to T
MAX
Unipolar Offset
Bipolar Offset
Full-Scale Calibration
POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration
V
CC
= 15 V
±
1.5 V or 12 V
±
0.6 V
V
LOGIC
= 5 V
±
0.5 V
V
EE
= –15 V
±
1.5 V or –12 V
±
0.6 V
ANALOG INPUT
Input Ranges
Bipolar
Unipolar
Input Impedance
10 Volt Span
20 Volt Span
DIGITAL CHARACTERISTICS
1
(T
MIN
–T
MAX
)
Inputs
2
(CE,
CS,
R/C, A
0
)
Logic “1” Voltage
Logic “0” Voltage
Current
Capacitance
Output (DB11–DB0, STS)
Logic “1” Voltage (I
SOURCE
500
µA)
Logic “0” Voltage (I
SINK
1.6 mA)
Leakage (DB11–DB0, High-Z State)
Capacitance
POWER SUPPLIES
Operating Range
V
LOGIC
V
CC
V
EE
Operating Current
I
LOGIC
I
CC
I
EE
POWER DISSIPATION
INTERNAL REFERENCE VOLTAGE
Output Current (Available for External Loads)
3
(External Load Should not Change During Conversion)
PACKAGE OPTIONS
4
Ceramic (D-28)
Plastic (N-28)
PLCC (P-28A)
LCC (E-28A)
1
(@ +25 C with V
CC
= +15 V or +12 V, V
LOGIC
= +5 V, V
EE
= –15 V or –12 V
unless otherwise noted)
AD574AJ
Typ
Max
12
±
1
±
1
Min
AD574AK
Typ
Max
12
±
1/2
±
1/2
Min
AD574AL
Typ
Max
12
±
1/2
±
1/2
Units
Bits
LSB
LSB
Min
11
±
2
±
4
12
±
1
±
4
12
±
1
±
2
Bits
LSB
LSB
0.25
0
+70
0
0.25
+70
0
0.125
+70
% of FS
°C
±
2 (10)
±
2 (10)
±
9 (50)
±
1 (5)
±
1 (5)
±
5 (27)
±
1 (5) LSB (ppm/°C)
±
1 (5) LSB (ppm/°C)
±
2 (10) LSB (ppm/°C)
±
2
±
1/2
±
2
±
1
±
1/2
±
1
±
1
±
1/2
±
1
LSB
LSB
LSB
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
Volts
Volts
Volts
Volts
kΩ
kΩ
+2.0
–0.5
–20
5
+2.4
–20
5
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
Volts
Volts
µA
pF
Volts
Volts
µA
pF
+0.4
+20
–20
5
+0.4
+20
–20
5
+0.4
+20
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.99
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.01
1.5
Volts
Volts
Volts
mA
mA
mA
mW
Volts
mA
AD574ASD
AD574AJN
AD574AJP
AD574AJE
AD574AKD
AD574AKN
AD574AKP
AD574AKE
AD574ALD
AD574ALN
NOTES
Detailed Timing Specifications appear in the Timing Section.
2
12/8 Input is not TTL-compatible and must be hard wired to V
LOGIC
or Digital Common.
3
The reference should be buffered for operation on
±
12 V supplies.
4
D = Ceramic DIP; N = Plastic DIP; P = Plastic Leaded Chip Carrier.
Specifications subject to change without notice.
–2–
REV. B
AD574A
Model
RESOLUTION
LINEARITY ERROR @ +25°C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum Resolution for Which No
Missing Codes are Guaranteed)
T
MIN
to T
MAX
UNIPOLAR OFFSET (Adjustable to Zero)
BIPOLAR OFFSET (Adjustable to Zero)
FULL-SCALE CALIBRATION ERROR
(With Fixed 50
Resistor from REF OUT to REF IN)
(Adjustable to Zero)
TEMPERATURE RANGE
TEMPERATURE COEFFICIENTS
(Using Internal Reference)
(T
MIN
to T
MAX
)
Unipolar Offset
Bipolar Offset
Full-Scale Calibration
POWER SUPPLY REJECTION
Max Change in Full-Scale Calibration
V
CC
= 15 V
±
1.5 V or 12 V
±
0.6 V
V
LOGIC
= 5 V
±
0.5 V
V
EE
= –15 V
±
1.5 V or –12 V
±
0.6 V
ANALOG INPUT
Input Ranges
Bipolar
Unipolar
Input Impedance
10 Volt Span
20 Volt Span
DIGITAL CHARACTERISTICS
1
(T
MIN
–T
MAX
)
Inputs
2
(CE,
CS,
R/C, A
0
)
Logic “1” Voltage
Logic “0” Voltage
Current
Capacitance
Output (DB11–DB0, STS)
Logic “1” Voltage (I
SOURCE
500
µA)
Logic “0” Voltage (I
SINK
1.6 mA)
Leakage (DB11–DB0, High-Z State)
Capacitance
POWER SUPPLIES
Operating Range
V
LOGIC
V
CC
V
EE
Operating Current
I
LOGIC
I
CC
I
EE
POWER DISSIPATION
INTERNAL REFERENCE VOLTAGE
Output Current (Available for External Loads)
3
(External Load Should not Change During Conversion)
PACKAGE OPTION
4
Ceramic (D-28)
1
Min
AD574AS
Typ
Max
12
±
1
±
1
Min
AD574AT
Typ
Max
12
±
1/2
±
1
Min
AD574AU
Typ Max
12
±
1/2
±
1
Units
Bits
LSB
LSB
11
±
2
±
4
12
±
1
±
4
12
±
1
±
2
Bits
LSB
LSB
0.25
–55
+125
–55
0.25
+125
–55
0.125
+125
% of FS
°C
±
2 (5)
±
4 (10)
±
20 (50)
±
1 (2.5)
±
2 (5)
±
10 (25)
±
1 (2.5) LSB (ppm/°C)
±
1 (2.5) LSB (ppm/°C)
±
5 (12.5) LSB (ppm/°C)
±
2
±
1/2
±
2
±
1
±
1/2
±
1
±
1
±
1/2
±
1
LSB
LSB
LSB
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
–5
–10
0
0
3
6
5
10
+5
+10
+10
+20
7
14
Volts
Volts
Volts
Volts
kΩ
kΩ
+2.0
–0.5
–20
5
+2.4
–20
5
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
+2.0
–0.5
–20
5
+2.4
+5.5
+0.8
+20
Volts
Volts
µA
pF
Volts
Volts
µA
pF
+0.4
+20
–20
5
+0.4
+20
–20
5
+0.4
+20
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.98
10.0
+5.5
+16.5
–16.5
40
5
30
725
10.02
1.5
+4.5
+11.4
–11.4
30
2
18
390
9.99
+5.5
+16.5
–16.5
40
5
30
725
Volts
Volts
Volts
mA
mA
mA
mW
Volts
mA
10.0 10.01
1.5
AD574ASD
AD574ATD
AD574AUD
NOTES
Detailed Timing Specifications appear in the Timing Section.
2
12/8 Input is not TTL-compatible and must be hard wired to V
LOGIC
or Digital Common.
3
The reference should be buffered for operation on
±
12 V supplies.
4
D = Ceramic DIP.
Specifications subject to change without notice.
REV. B
–3–
AD574A
+5V SUPPLY
V
LOGIC
DATA MODE SELECT
12/8
CHIP SELECT
CS
BYTE ADDRESS/
SHORT CYCLE
A
O
READ/CONVERT
R/C
CHIP ENABLE
CE
+12/+15V SUPPLY
V
CC
+10V REFERENCE
REF OUT
ANALOG COMMON
AC
REFERENCE INPUT
REF IN
-12/-15V SUPPLY
V
EE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT
10V
IN
1
2
3
4
5
6
7
COMP 12
8
9
10
19.95k
11
12
13
5k
9.95k
5k
DAC N
V
EE
10V
REF
I
DAC
I
DAC
=
4 x N x I
REF
I
REF
8k
CLOCK
3k
SAR
12
CONTROL
3
S
T
A
T
E
O
U
T
P
U
T
B
U
F
F
E
R
S
MSB
28
N
I
B
B
L
E
A
N
I
B
B
L
E
B
N
I
B
B
L
E
C
LSB
STATUS
STS
DB11
27
MSB
26 DB10
25 DB9
24 DB8
23 DB7
22 DB6
21 DB5
20 DB4
DIGITAL
DATA
OUTPUTS
19 DB3
18 DB2
17 DB1
DB0
16 LSB
15 DIGITAL COMMON
DC
20V SPAN INPUT 14
20V
IN
AD574A
12
AD574A Block Diagram and Pin Configuration
ABSOLUTE MAXIMUM RATINGS*
(Specifications apply to all grades, except where noted)
V
CC
to Digital Common . . . . . . . . . . . . . . . . . . 0 V to +16.5 V
V
EE
to Digital Common . . . . . . . . . . . . . . . . . . . 0 V to –16.5 V
V
LOGIC
to Digital Common . . . . . . . . . . . . . . . . . . 0 V to +7 V
Analog Common to Digital Common . . . . . . . . . . . . . . .
±
1 V
Control Inputs (CE,
CS,
A
O
12/8, R/C) to
Digital Common . . . . . . . . . . . . . . –0.5 V to V
LOGIC
+ 0.5 V
Analog Inputs (REF IN, BIP OFF, 10 V
IN
) to
Analog Common . . . . . . . . . . . . . . . . . . . . . . . . . V
EE
to V
CC
20 V
IN
to Analog Common . . . . . . . . . . . . . . . . . . . . . .
±
24 V
REF OUT . . . . . . . . . . . . . . . . . . Indefinite Short to Common
Momentary Short to V
CC
Chip Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
Lead Temperature (Soldering, 10 sec). . . . . . . . . . . . . +300°C
Storage Temperature (Ceramic) . . . . . . . . . . –65°C to +150°C
(Plastic) . . . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +100°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
1
Temperature
Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Linearity Error
Max (T
MIN
to T
MAX
)
±
1 LSB
±
1/2 LSB
±
1/2 LSB
±
1 LSB
±
1 LSB
±
1 LSB
Resolution
No Missing Codes
(T
MIN
to T
MAX
)
11 Bits
12 Bits
12 Bits
11 Bits
12 Bits
12 Bits
Max
Full Scale
T.C. (ppm/°C)
50.0
27.0
10.0
50.0
25.0
12.5
AD574AJ(X)
AD574AK(X)
AD574AL(X)
AD574AS(X)
2
AD574AT(X)
2
AD574AU(X)
2
NOTES
1
X = Package designator. Available packages are: D (D-28) for all grades. E (E-28A) for J and K grades and /883B processed S, T
and U grades. N (N-28) for J, K, and L grades. P (P-28A) for PLCC in J, K grades. Example: AD574AKN is K grade in plastic DIP.
2
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to Analog Devices Military Products
Databook.
–4–
REV. B
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参数对比
与AD574ATD/833B相近的元器件有:AD574AUD/833B。描述及对比如下:
型号 AD574ATD/833B AD574AUD/833B
描述 ADC, Successive Approximation ADC, Successive Approximation
厂商名称 ADI(亚德诺半导体) ADI(亚德诺半导体)
包装说明 DIP, DIP,
Reach Compliance Code compliant compliant
最大模拟输入电压 10 V 10 V
最小模拟输入电压 -10 V -10 V
最长转换时间 32000 µs 32000 µs
转换器类型 ADC, SUCCESSIVE APPROXIMATION ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码 R-CDIP-T28 R-CDIP-T28
长度 35.81 mm 35.81 mm
最大线性误差 (EL) 0.0122% 0.0122%
标称负供电电压 -12 V -12 V
模拟输入通道数量 1 1
位数 12 12
功能数量 1 1
端子数量 28 28
最高工作温度 125 °C 125 °C
最低工作温度 -55 °C -55 °C
输出位码 BINARY BINARY
输出格式 PARALLEL PARALLEL
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DIP DIP
封装形状 RECTANGULAR RECTANGULAR
封装形式 IN-LINE IN-LINE
采样并保持/跟踪并保持 SAMPLE SAMPLE
筛选级别 MIL-STD-883 MIL-STD-883
座面最大高度 3.43 mm 3.43 mm
标称供电电压 12 V 12 V
表面贴装 NO NO
温度等级 MILITARY MILITARY
端子形式 THROUGH-HOLE THROUGH-HOLE
端子节距 2.54 mm 2.54 mm
端子位置 DUAL DUAL
宽度 15.24 mm 15.24 mm
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器件捷径:
00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
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