a
FEATURES
Enhanced Replacements for LF412 and TL082
AC PERFORMANCE
Settles to 0.01% in 1.0 ms
16 V/ s min Slew Rate (AD712J)
3 MHz min Unity Gain Bandwidth (AD712J)
DC PERFORMANCE
0.30 mV max Offset Voltage: (AD712C)
5 V/ C max Drift: (AD712C)
200 V/mV min Open-Loop Gain (AD712K)
4 V p-p max Noise, 0.1 Hz to 10 Hz (AD712C)
Surface Mount Available in Tape and Reel in Accor-
dance with EIA-481A Standard
MIL-STD-883B Parts Available
Single Version Available: AD711
Quad Version: AD713
Available in Plastic Mini-DIP, Plastic SOIC, Hermetic
Cerdip, Hermetic Metal Can Packages and Chip Form
PRODUCT DESCRIPTION
Dual Precision, Low Cost,
High Speed, BiFET Op Amp
AD712
CONNECTION DIAGRAMS
TO-99
(H) Package
AMPLIFIER NO. 1
OUTPUT
INVERTING
OUTPUT
NONINVERTING
OUTPUT
+V
S
AMPLIFIER NO. 2
OUTPUT
INVERTING
INPUT
AD712
–V
S
NONINVERTING
INPUT
Plastic Mini-DIP (N) Package
SOIC (R) Package and Cerdip (Q) Package
AMPLIFIER NO. 1
OUTPUT
1
INVERTING
2
OUTPUT
NONINVERTING
3
OUTPUT
V–
4
AMPLIFIER NO. 2
8
7
6
V+
OUTPUT
AD712
INVERTING
INPUT
NONINVERTING
5
INPUT
The AD712 is a high speed, precision monolithic operational
amplifier offering high performance at very modest prices. Its
very low offset voltage and offset voltage drift are the results of
advanced laser wafer trimming technology. These performance
benefits allow the user to easily upgrade existing designs that use
older precision BiFETs and, in many cases, bipolar op amps.
The superior ac and dc performance of this op amp makes it
suitable for active filter applications. With a slew rate of 16 V/µs
and a settling time of 1
µs
to
±
0.01%, the AD712 is ideal as a
buffer for 12-bit D/A and A/D Converters and as a high-speed
integrator. The settling time is unmatched by any similar IC
amplifier.
The combination of excellent noise performance and low input
current also make the AD712 useful for photo diode preamps.
Common-mode rejection of 88 dB and open loop gain of
400 V/mV ensure 12-bit performance even in high-speed unity
gain buffer circuits.
The AD712 is pinned out in a standard op amp configuration
and is available in seven performance grades. The AD712J and
AD712K are rated over the commercial temperature range of
0°C to +70°C. The AD712A, AD712B and AD712C are rated
over the industrial temperature range of –40°C to +85°C. The
AD712S and AD712T are rated over the military temperature
range of –55°C to +125°C and are available processed to MIL-
STD-883-B, Rev. C.
Extended reliability PLUS screening is available, specified over
the commercial and industrial temperature ranges. PLUS
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
screening includes 168-hour burn-in, as well as other environ-
mental and physical tests.
The AD712 is available in an 8-lead plastic mini-DIP, SOIC,
cerdip, TO-99 metal can, or in chip form.
PRODUCT HIGHLIGHTS
1. The AD712 offers excellent overall performance at very
competitive prices.
2. Analog Devices’ advanced processing technology and with
100% testing guarantees a low input offset voltage (0.3 mV
max, C grade, 3 mV max, J grade). Input offset voltage is
specified in the warmed-up condition. Analog Devices’ laser
wafer drift trimming process reduces input offset voltage
drifts to 5
µV/°C
max on the AD712C.
3. Along with precision dc performance, the AD712 offers
excellent dynamic response. It settles to
±
0.01% in 1
µs
and
has a minimum slew rate of 16 V/µs. Thus this device is ideal
for applications such as DAC and ADC buffers which re-
quire a combination of superior ac and dc performance.
4. The AD712 has a guaranteed and tested maximum voltage
noise of 4
µV
p-p, 0.1 Hz to 10 Hz (AD712C).
5. Analog Devices’ well-matched, ion-implanted JFETs ensure
a guaranteed input bias current (at either input) of 50 pA
max (AD712C) and an input offset current of 10 pA max
(AD712C). Both input bias current and input offset current
are guaranteed in the warmed-up condition.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
AD712–SPECIFICATIONS
(V =
S
15 V @ T
A
= +25 C unless otherwise noted)
Min
AD712K/B/T
Typ
0.2
7
100
15
Max
1.0/0.7/0.7
2.0/1.5/1.5
10
86
86
Min
AD712C
Typ
0.1
3
110
15
75
1.7/4.8/77
100
25
0.6/1.6/26
1.0/0.7/0.7
2.0/1.5/1.5
10
25
120
90
3.4
18
4.0
200
20
1.0
0.0003
3
×
10
12
5.5
3
×
10
12
5.5
±
20
+14.5, –11.5
3.4
18
1.2
120
90
4.0
200
20
1.0
0.0003
3
×
10
12
5.5
3
×
10
12
5.5
±
20
+14.5, –11.5
+V
S
– 2
–V
S
+ 4
20
1.3
50
3.2
75
10
0.7
0.3
0.6
5
10
Max
0.3
0.6
5
Units
mV
mV
µV/°C
dB
dB
µV/Month
pA
nA
pA
pA
nA
mV
mV
µV/°C
pA
dB
dB
MHz
kHz
V/µs
µs
%
Ω
pF
Ω
pF
V
+V
S
– 2
V
Parameter
INPUT OFFSET VOLTAGE
Initial Offset
T
MIN
to T
MAX
vs. Temp
vs. Supply
T
MIN
to T
MAX
Long-Term Offset Stability
INPUT BIAS CURRENT
2
V
CM
= 0 V
V
CM
= 0 V @ T
MAX
V
CM
=
±
10 V
INPUT OFFSET CURRENT
V
CM
= 0 V
V
CM
= 0 V @ T
MAX
1
Min
AD712J/A/S
Typ
0.3
7
95
15
25
0.6/1.6/26
Max
3/1/1
4/2/2
20/20/20
76
76/76/76
80
80
75
1.7/4.8/77
100
25
0.6/1.6/26
3/1/1
4/2/2
20/20/20
25
20
0.5/1.3/20
10
0.3/0.7/11
5
0.1/0.3/5
5
0.3
MATCHING CHARACTERISTICS
Input Offset Voltage
T
MIN
to T
MAX
Input Offset Voltage Drift
Input Bias Current
Crosstalk @ f = 1 kHz
@ f = 100 kHz
FREQUENCY RESPONSE
Small Signal Bandwidth
Full Power Response
Slew Rate
Settling Time to 0.01%
Total Harmonic Distortion
INPUT IMPEDANCE
Differential
Common Mode
INPUT VOLTAGE RANGE
Differential
3
Common-Mode Voltage
4
T
MIN
to T
MAX
Common-Mode
Rejection Ratio
V
CM
=
±
10 V
T
MIN
to T
MAX
V
CM
=
±
11 V
T
MIN
to T
MAX
INPUT VOLTAGE NOISE
3.0
16
120
90
4.0
200
20
1.0
0.0003
3
×
10
12
5.5
3
×
10
12
5.5
±
20
+14.5, –11.5
1.2
1.2
–V
S
+ 4
+V
S
– 2
–V
S
+ 4
76
76/76/76
70
70/70/70
88
84
84
80
2
45
22
18
16
0.01
80
80
76
74
88
84
84
80
2
45
22
18
16
0.01
86
86
76
74
94
90
90
84
2
45
22
18
16
0.01
dB
dB
dB
dB
µV
p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
V/mV
V/mV
V
V
mA
V
V
mA
INPUT CURRENT NOISE
OPEN-LOOP GAIN
150
400
100/100/100
200
100
400
200
100
400
OUTPUT CHARACTERISTICS
Voltage
+13, –12.5
+13.9, –13.3
±
12/± 12/
12
+13.8, –13.1
Current
25
POWER SUPPLY
Rated Performance
Operating Range
Quiescent Current
±
15
4.5
5.0
18
6.8
+13, –12.5
+13.9, –13.3
12
+13.8, –13.1
25
±
15
4.5
5.0
18
6.0
+13, –12.5
+13.9, –13.3
12
+13.8, –13.1
25
±
15
4.5
5.0
18
5.6
NOTES
1
Input Offset Voltage specifications are guaranteed after 5 minutes of operation at T
A
= +25°C.
2
Bias Current specifications are guaranteed maximum at either input after 5 minutes of operation at T
A
= +25°C. For higher temperatures, the current doubles every 10°C.
3
Defined as voltage between inputs, such that neither exceeds
±
10 V from ground.
4
Typically exceeding –14.1 V negative common-mode voltage on either input results in an output phase reversal.
Specifications in
boldface
are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max
specifications are guaranteed, although only those shown in
boldface
are tested on all production units.
Specifications subject to change without notice.
–2–
REV. B
AD712
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Internal Power Dissipation
2
Input Voltage
3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . +V
S
and –V
S
Storage Temperature Range (Q, H) . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD712J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD712A/B/C . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD712S/T . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Thermal Characteristics:
8-Lead Plastic Package:
θ
JA
= 165°C/Watt
8-Lead Cerdip Package:
θ
JC
= 22°C/Watt;
θ
JA
= 110°C/Watt
8-Lead Metal Can Package:
θ
JC
= 65°C/Watt;
θ
JA
= 150°C/Watt
8-Lead SOIC Package:
θ
JA
= 100°C
3
For supply voltages less than
±
18 V, the absolute maximum input voltage is equal
to the supply voltage.
ORDERING GUIDE
Model
AD712ACHIPS
AD712AH
AD712AQ
AD712BH
AD712BQ
AD712CH
AD712CN
AD712JN
AD712JR
AD712JR-REEL
AD712JR-REEL7
AD712KN
AD712KR
AD712KR-REEL
AD712KR-REEL7
AD712SCHIPS
AD712SQ
AD712SQ/883B
AD712TQ
AD712TQ/883B
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Package
Description
Bare Die
8-Lead Metal Can
8-Lead Ceramic DIP
8-Lead Metal Can
8-Lead Ceramic DIP
8-Lead Metal Can
8-Lead Plastic DIP
8-Lead Plastic DIP
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic DIP
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
Bare Die
8-Lead Ceramic DIP
8-Lead Ceramic DIP
8-Lead Ceramic DIP
8-Lead Ceramic DIP
Package
Option
H-08A
Q-8
H-08A
Q-8
H-08A
N-8
N-8
R-8
R-8
R-8
N-8
R-8
R-8
R-8
Q-8
Q-8
Q-8
Q-8
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
REV. B
–3–
AD712–Typical Performance Characteristics
20
20
OUTPUT VOLTAGE SWING – Volts p–p
30
OUTPUT VOLTAGE SWING – Volts
INPUT VOLTAGE SWING – Volts
25
15
15
+V
OUT
10
20
15V SUPPLIES
15
10
R
L
= 2k
25 C
5
–V
OUT
R
L
= 2k
25 C
10
5
5
0
0
10
5
SUPPLY VOLTAGE
15
Volts
20
0
0
10
5
SUPPLY VOLTAGE
15
Volts
20
0
10
100
1k
LOAD RESISTANCE –
10k
Figure 1. Input Voltage Swing vs.
Supply Voltage
Figure 2. Output Voltage Swing vs.
Supply Voltage
Figure 3. Output Voltage Swing
vs. Load Resistance
6
INPUT BIAS CURRENT (V
CM
= 0) – Amps
10
6
10
7
10
8
10
9
10
10
10
11
10
12
–60 –40 –40
OUTPUT IMPEDANCE –
100
QUIESCENT CURRENT – mA
5
10
4
1.0
3
0.1
2
0
10
5
SUPPLY VOLTAGE
15
Volts
20
0 20 40 60 80 100 120 140
TEMPERATURE – C
0.01
1k
10k
100k
1M
FREQUENCY – Hz
10M
Figure 4. Quiescent Current vs.
Supply Voltage
Figure 5. Input Bias Current vs.
Temperature
Figure 6. Output Impedance vs.
Frequency
100
26
SHORT CIRCUIT CURRENT LIMIT – mA
UNITY GAIN BANDWIDTH – MHz
24
+ OUTPUT CURRENT
22
20
18
– OUTPUT CURRENT
16
14
12
10
–60 –40 –20 0 20 40 60 80 100 120 140
AMBIENT TEMPERATURE – C
5.0
INPUT BIAS CURRENT – pA
MAX J GRADE LIMIT
75
V
S
= +15V
25 C
50
4.5
4.0
25
3.5
0
–10
0
5
–5
COMMON MODE VOLTAGE – Volts
10
3.0
–60 –40 –20
0 20 40 60 80 100 120 140
TEMPERATURE – C
Figure 7. Input Bias Current vs.
Common Mode Voltage
Figure 8. Short Circuit Current
Limit vs. Temperature
Figure 9. Unity Gain Bandwidth vs.
Temperature
–4–
REV. B
AD712
100
80
OPEN LOOP GAIN – dB
100
80
OPEN LOOP GAIN – dB
PHASE MARGIN – C
125
110
120
POWER SUPPLY REJECTION – dB
100
+ SUPPLY
80
60
40
GAIN
PHASE
2k
100pF
LOAD
60
40
115
R
L
= 2k
25 C
60
– SUPPLY
V
S
= 15V SUPPLIES
WITH 1V p-p SINE
WAVE 25 C
110
105
40
20
20
0
–20
10
0
–20
10M
100
95
0
5
10
SUPPLY VOLTAGE
15
Volts
20
20
100
1k
10k
100k
FREQUENCY – Hz
1M
0
10
100
1k
10k
100k
1M
SUPPLY MODULATION FREQUENCY – Hz
Figure 10. Open-Loop Gain and
Phase Margin vs. Frequency
Figure 11. Open-Loop Gain vs.
Supply Voltage
Figure 12. Power Supply Rejection
vs. Frequency
100
OUTPUT VOLTAGE – Volts p–p
30
VOLTS
OUTPUT SWING FROM 0V TO
R
L
= 2k
25 C
V
S
= 15V
10
8
6
4
2
0
–2
–4
–6
–8
–10
0.5
0.6
0.7
0.8
0.9
SETTLING TIME – s
1.0
ERROR 1% 0.1% 0.01%
1% 0.1% 0.01%
80
V
S
= 15V
V
CM
= 1Vp-p
25 C
25
20
CMR – dB
60
15
40
10
20
5
0
100k
0
10
100
1k
10k
100k
FREQUENCY – Hz
1M
1M
INPUT FREQUENCY – Hz
10M
Figure 13. Common Mode Rejec-
tion vs. Frequency
Figure 14. Large Signal Frequency
Response
Figure 15. Output Swing and Error
vs. Settling Time
–70
1k
25
–80
3V RMS
R
L
= 2k
C
L
= 100pF
INPUT NOISE VOLTAGE – nV/ Hz
20
100
–90
SLEW RATE – V/ s
1
10
100
1k
FREQUENCY – Hz
10k
100k
THD – dB
15
–100
10
–110
10
5
–120
–130
100
1
1k
10k
FREQUENCY – Hz
100k
0
0
100 200 300 400 500 600 700 800 900
INPUT ERROR SIGNAL – mV
(AT SUMMING JUNCTION)
Figure 16. Total Harmonic Distor-
tion vs. Frequency
Figure 17. Input Noise Voltage
Spectral Density
Figure 18. Slew Rate vs. Input
Error Signal
REV. B
–5–
微控制器 MCU
