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FEATURES
Fast 12-Bit ADC with 6 s Conversion Time
8-Pin Mini-DlP and SOIC
Single Supply Operation
High Speed, Easy-to-Use, Serial Interface
On-Chip Track/Hold Amplifier
Selection of Input Ranges
10 V for AD7893-10
2.5 V for AD7893-3
0 V to +2.5 V for AD7893-2
0 V to +5 V for AD7893-5
Low Power: 25 mW typ
LC MOS 12-Bit, Serial 6 s
ADC in 8-Pin Package
AD7893
FUNCTIONAL BLOCK DIAGRAM
REF IN
V
DD
2
AD7893
TRACK/
HOLD
12-BIT
ADC
V
IN
SIGNAL
SCALING*
CONVST
OUTPUT
REGISTER
AGND
DGND
SCLK
SDATA
*AD7893-5, AD7893-10, AD7893-3
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD7893 is a fast, 12-bit ADC that operates from a single
+5 V supply and is housed in a small 8-pin mini-DIP and 8-pin
SOIC. The part contains a 6
µs
successive approximation A/D
converter, an on-chip track/hold amplifier, an on-chip clock and
a high speed serial interface.
Output data from the AD7893 is provided via a high speed,
serial interface port. This two-wire serial interface has a serial
clock input and a serial data output with the external serial clock
accessing the serial data from the part.
In addition to traditional dc accuracy specifications such as lin-
earity, full-scale and offset errors, the AD7893 is also specified
for dynamic performance parameters, including harmonic dis-
tortion and signal-to-noise ratio.
The part accepts an analog input range of
±
10 V (AD7893-10),
±
2.5 V (AD7893-3), 0 V to +5 V (AD7893-5) or 0 V to +2.5 V
(AD7893-2) and operates from a single +5 V supply, consuming
only 25 mW typical.
The AD7893 is fabricated in Analog Devices’ Linear Compat-
ible CMOS (LC
2
MOS) process, a mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. The part is available in a small, 8-pin, 0.3" wide, plastic or
hermetic dual-in-line package (mini-DIP) and in an 8-pin, small
outline IC (SOIC).
1. Fast, 12-Bit ADC in 8-Pin Package
The AD7893 contains a 6
µs
ADC, a track/hold amplifier,
control logic and a high speed serial interface, all in an 8-pin
package. This offers considerable space saving over alterna-
tive solutions.
2. Low Power, Single Supply Operation
The AD7893 operates from a single +5 V supply and con-
sumes only 25 mW. This low power, single supply operation
makes it ideal for battery powered or portable applications.
3. High Speed Serial Interface
The part provides high speed serial data and serial clock lines,
allowing for an easy, two-wire serial interface arrangement.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
AD7893–SPECIFICATIONS
A
Parameter
DYNAMIC PERFORMANCE
Signal to (Noise + Distortion) Ratio
2
@ +25°C
Total Harmonic Distortion (THD)
2
Peak Harmonic or Spurious Noise
2
Intermodulation Distortion (IMD)
2
2nd Order Terms
3rd Order Terms
DC ACCURACY
Resolution
Minimum Resolution for which
No Missing Codes are Guaranteed
Relative Accuracy
2
Differential Nonlinearity
2
Positive Full-Scale Error
2
AD7893-2, AD7893-5
Unipolar Offset Error
AD7893-10, AD7893-3
Negative Full-Scale Error
2
Bipolar Zero Error
ANALOG INPUT
AD7893-10
Input Voltage Range
Input Resistance
AD7893-3
Input Voltage Range
Input Resistance
AD7893-5
Input Voltage Range
Input Resistance
AD7893-2
Input Voltage Range
Input Current
REFERENCE INPUT
REF IN Input Voltage Range
Input Current
Input Capacitance
3
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN3
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Output Coding
AD7893-10, AD7893-3
AD7893-2, AD7893-5
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
2
POWER REQUIREMENTS
V
DD
I
DD
Power Dissipation
Versions
l
(V
DD
= +5 V, AGND = DGND = 0 V, REF IN = +2.5 V. All specifications T
MIN
to T
MAX
unless
otherwise noted.)
B
Versions
S
Version
Units
Test Conditions/Comments
70
–80
–80
–80
–80
12
12
±
1
±
1
±
3
±
4
±
3
±
4
70
–80
–80
–80
–80
12
12
±
1/2
±
1
±
1.5
±
3
±
1.5
±
2
70
–80
–80
–80
–80
12
12
±
1
±
1
±
3
±
4
±
3
±
4
dB min
dB max
dB max
dB max
dB max
Bits
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 117 kHz
f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 117 kHz
f
IN
= 10 kHz Sine Wave, f
SAMPLE
= 117 kHz
fa = 9 kHz, fb
=
9.5 kHz, f
SAMPLE
= 117 kHz
±
10
16
±
2.5
4
0 to +5
9
0 to +2.5
500
2.375/2.625
2
10
2.4
0.8
±
10
10
4.0
0.4
±
10
16
±
2.5
4
0 to +5
9
0 to +2.5
500
2.375/2.625
2
10
2.4
0.8
±
10
10
4.0
0.4
2s Complement
Straight (Natural) Binary
±
10
16
±
2.5
4
0 to +5
9
0 to +2.5
500
2.375/2.625
10
10
2.4
0.8
±
10
10
4.0
0.4
Volts
kΩ min
Volts
kΩ min
Volts
kΩ min
Volts
nA max
V min/V max 2.5 V
±
5%
µA
max
pF max
V min
V max
µA
max
pF max
V min
V max
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
I
SOURCE
= 200
µA
I
SINK
= 1.6 mA
6
1.5
+5
9
45
6
1.5
+5
9
45
6
1.5
+5
9
45
µs
max
µs
max
V nom
mA max
mW max
±
5% for Specified Performance
Typically 25 mW
NOTES
1
Temperature Ranges are as follows: A, B Versions: –40°C to +85°C, S Version: –55°C to +125°C.
2
See Terminology.
3
Sample tested @ +25°C to ensure compliance.
Specifications subject to change without notice.
–2–
REV. E
AD7893
TIMING CHARACTERISTICS
1, 2
(V
Parameter
t
1
t
2
t
3
t
4 3
t
5 4
A, B
Versions
50
60
30
50
10
100
50
70
40
60
10
100
DD
= +5 V, AGND = DGND = 0 V, REF IN = +2.5 V)
Units
ns min
ns min
ns min
ns max
ns min
ns max
Test Conditions/Comments
CONVST
Pulse Width
SCLK High Pulse Width
SCLK Low Pulse Width
SCLK Rising Edge to Data Valid Delay
Bus Relinquish Time after Falling Edge of SCLK
S
Version
NOTES
1
Sample tested at +25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.6 V.
2
See Figure 5.
3
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
4
Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
5
, quoted in the timing characteristics is the true bus relinquish time
of the part and, as such, is independent of external bus loading capacitances.
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to AGND
AD7893-10, AD7893-5 . . . . . . . . . . . . . . . . . . . . . . .
±
17 V
AD7893-2, AD7893-3 . . . . . . . . . . . . . . . . . . . –5 V, +10 V
Reference Input Voltage to AGND . . . –0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to DGND . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40°C to +85°C
Extended (S Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 130°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +260°C
Cerdip Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 125°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 170°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
1.6mA
TO
OUTPUT
PIN
50pF
+2.1V
200µA
Figure 1. Load Circuit for Access Time and Bus
Relinquish Time
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7893 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. E
–3–
AD7893
PIN FUNCTION DESCRIPTION
Pin
No.
1
Pin
Mnemonic
REF IN
Description
Voltage Reference Input. An external reference source should be connected to this pin to provide the refer-
ence voltage for the AD7893’s conversion process. The REF IN input is buffered on-chip. The nominal ref-
erence voltage for correct operation of the AD7893 is +2.5 V.
Analog Input Channel. The analog input range is
±
10 V (AD7893-10),
±
2.5 V (AD7893-3), 0 V to +5 V
(AD7893-5) and 0 V to +2.5 V (AD7893-2).
Analog Ground. Ground reference for track/hold, comparator and DAC.
Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7893. A
new serial data bit is clocked out on the rising edge of this serial clock, and data is valid on the falling edge.
The serial clock input should be taken low at the end of the serial data transmission.
Serial Data Output. Serial data from the AD7893 is provided at this output. The serial data is clocked out by
the rising edge of SCLK and is valid on the falling edge of SCLK. Sixteen bits of serial data are provided
with four leading zeros followed by the 12 bits of conversion data. On the sixteenth falling edge of SCLK, the
SDATA line is disabled (three-stated). Output data coding is twos complement for the AD7893-10 and
AD7893-3, straight binary for the AD7893-2 and AD7893-5.
Digital Ground. Ground reference for digital circuitry.
Convert Start. Edge-triggered logic input. On the falling edge of this input, the serial clock counter is reset to
zero. On the rising edge of this input, the track/hold goes into its hold mode and conversion is initiated.
Positive supply voltage, +5 V
±
5%.
PIN CONFIGURATION
DIP and SOIC
2
3
4
V
IN
AGND
SCLK
5
SDATA
6
7
8
DGND
CONVST
V
DD
REF IN
V
IN
AGND
SCLK
1
2
3
4
8
V
DD
CONVST
DGND
SDATA
AD7893
TOP VIEW
(NOT TO SCALE)
7
6
5
ORDERING GUIDE
Model
AD7893AN-2
AD7893BN-2
AD7893AR-2
AD7893BR-2
AD7893SQ-2
AD7893AN-5
AD7893BN-5
AD7893AR-5
AD7893BR-5
AD7893SQ-5
AD7893AN-10
AD7893BN-10
AD7893AR-10
AD7893BR-10
AD7893SQ-10
AD7893AR-3
Temperature
Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
Linearity
Error
SNR
±
1 LSB
70 dB
±
1/2 LSB 72 dB
±
1 LSB
70 dB
±
1/2 LSB 72 dB
±
1 LSB
70 dB
±
1 LSB
70 dB
±
1/2 LSB 72 dB
±
1 LSB
70 dB
±
1/2 LSB 72 dB
±
1 LSB
70 dB
±
1 LSB
70 dB
±
1/2 LSB 72 dB
±
1 LSB
70 dB
±
1/2 LSB 72 dB
±
1 LSB
70 dB
±
1 LSB
70 dB
Package
Options*
N-8
N-8
SO-8
SO-8
Q-8
N-8
N-8
SO-8
SO-8
Q-8
N-8
N-8
SO-8
SO-8
Q-8
SO-8
*N = Plastic DIP, Q = Cerdip, SO = SOIC.
–4–
REV. E
