8-Channel, 10- and 12-Bit ADCs with I
2
C-
Compatible Interface in 20-Lead TSSOP
AD7997/AD7998
FEATURES
10- and 12-bit ADC with fast conversion time: 2 µs typ
8 single-ended analog input channels
Specified for V
DD
of 2.7 V to 5.5 V
Low power consumption
Fast throughput rate: up to 188 kSPS
Sequencer operation
Automatic cycle mode
I
2
C®-compatible serial interface supports standard, fast,
and high speed modes
Out-of-range indicator/alert function
Pin-selectable addressing via AS
Shutdown mode: 1 µA max
Temperature range:
−40°C
to +85°C
20-lead TSSOP package
See the
AD7992
and
AD7994
for 2-channel and 4-channel
equivalent devices, respectively
V
DD
FUNCTIONAL BLOCK DIAGRAM
AGND
REF
IN
CONVST
AD7997/AD7998
V
IN
1
8:1
I/P
MUX
V
IN
8
T/H
10-/12-BIT
SUCCESSIVE
APPROXIMATION
ADC
CONTROL
LOGIC
OSCILLATOR
DATA
LOW
LIMIT
REGISTER CH1–CH4
CONVERSION
RESULT
REGISTER
CONFIGURATION
REGISTER
ALERT STATUS
REGISTER
CYCLE TIMER
REGISTER
I
2
C INTERFACE
SCL
SDA
03473-0-001
DATA
HIGH
LIMIT
REGISTER CH1–CH4
ALERT/BUSY
HYSTERESIS
REGISTER CH1–CH4
AS
GENERAL DESCRIPTION
The AD7997/AD7998 are 8-channel, 10- and 12-bit, low power,
successive approximation ADCs with an I
2
C-compatible
interface. The parts operate from a single 2.7 V to 5.5 V power
supply and feature a 2 µs conversion time. The parts contain an
8-channel multiplexer and track-and-hold amplifier that can
handle input frequencies up to 11 MHz.
The AD7997/AD7998 provide a 2-wire serial interface that is
compatible with I
2
C interfaces. Each part comes in two versions,
AD7997-0/AD7998-0 and AD7997-1/AD7998-1, and each
version allows at least two different I
2
C addresses. The I
2
C
interface on the AD7997-0/AD7998-0 supports standard and
fast I
2
C interface modes. The I
2
C interface on the AD7997-1/
AD7998-1 supports standard, fast, and high speed I
2
C interface
modes.
The AD7997/AD7998 normally remain in a shutdown state
while not converting, and power up only for conversions. The
conversion process can be controlled using the CONVST pin,
by a command mode where conversions occur across I
2
C write
operations or an automatic conversion interval mode selected
through software control.
The AD7997/AD7998 require an external reference that should
be applied to the REF
IN
pin and can be in the range of 1.2 V to
V
DD
. This allows the widest dynamic input range to the ADC.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
AGND
Figure 1.
On-chip limit registers can be programmed with high and
low limits for the conversion result, and an open-drain, out-of-
range indicator output (ALERT) becomes active when the
programmed high or low limits are violated by the conversion
result. This output can be used as an interrupt.
PRODUCT HIGHLIGHTS
1.
2.
2 µs conversion time with low power consumption.
I
2
C-compatible serial interface with pin-selectable
addresses. Two AD7997/AD7998 versions allow five
AD7997/AD7998 devices to be connected to the same
serial bus.
The parts feature automatic shutdown while not converting
to maximize power efficiency. Current consumption is 1 µA
max when in shutdown mode at 3V.
Reference can be driven up to the power supply.
Out-of-range indicator that can be software disabled or
enabled.
One-shot and automatic conversion rates.
Registers store minimum and maximum conversion
results.
3.
4.
5.
6.
7.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD7997/AD7998
TABLE OF CONTENTS
AD7997 Specifications..................................................................... 3
AD7998 Specifications..................................................................... 5
I
2
C Timing Specifications ................................................................ 7
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Pin Function Descriptions.................... 10
Terminology .................................................................................... 11
Typical Performance Characteristics ........................................... 12
Circuit Information ........................................................................ 15
Converter Operation.................................................................. 15
Typical Connection Diagram ................................................... 16
Analog Input ............................................................................... 16
Internal Register Structure ............................................................ 18
Address Pointer Register ........................................................... 18
Configuration Register .............................................................. 19
Conversion Result Register ....................................................... 20
Limit Registers ............................................................................ 20
Alert Status Register (CH1 to CH4) ........................................ 21
Cycle Timer Register.................................................................. 22
Sample Delay and Bit Trial Delay............................................. 22
Serial Interface ................................................................................ 23
Serial Bus Address ...................................................................... 23
Writing to the AD7997/AD7998 .................................................. 24
Writing to the Address Pointer Register for a Subsequent
Read.............................................................................................. 24
Writing a Single Byte of Data to the Alert Status Register or
Cycle Register.............................................................................. 24
Writing Two Bytes of Data to a Limit, Hysteresis, or
Configuration Register .............................................................. 24
Reading Data from the AD7997/AD7998................................... 26
ALERT/BUSY Pin .......................................................................... 27
SMBus ALERT ............................................................................ 27
BUSY ............................................................................................ 27
Placing the AD7997-1/AD7998-1 into High Speed Mode ... 27
The Address Select (AS) Pin ..................................................... 27
Modes of Operation ....................................................................... 28
Mode 1—Using the CONVST Pin ........................................... 28
Mode 2 – COMMAND MODE ............................................... 29
Mode 3—Automatic Cycle Interval Mode.............................. 30
Outline Dimensions ....................................................................... 31
Ordering Guide .......................................................................... 31
Related Parts in I
2
C-Compatible ADC Product Family........ 31
REVISION HISTORY
9/04—Revision 0: Initial Version
Rev. 0 | Page 2 of 32
AD7997/AD7998
AD7997 SPECIFICATIONS
Temperature range for B version is −40°C to +85°C. Unless otherwise noted, V
DD
= 2.7 V to 5.5 V; REF
IN
= 2.5 V; For the AD7997-0, all
specifications apply for f
SCL
up to 400 kHz; for the AD7997-1, all specifications apply for f
SCL
up to 3.4 MHz, unless otherwise noted;
T
A
= T
MIN
to T
MAX
.
Table 1.
Parameter
DYNAMIC PERFORMANCE
1
B Version
Unit
Test Conditions/Comments
F
IN
= 10 kHz sine wave for f
SCL
from 1.7 MHz to
3.4 MHz
F
IN
= 1 kHz sine wave for f
SCL
up to 400 kHz
Signal to Noise + Distortion (SINAD)
2
Total Harmonic Distortion (THD)
2
Peak Harmonic or Spurious Noise (SFDR)
2
Intermodulation Distortion (IMD)
2
61
–75
–76
dB min
dB max
dB max
fa = 10.1 kHz, fb = 9.9 kHz for f
SCL
from 1.7 MHz
to 3.4 MHz
fa = 1.1 kHz, fb = 0.9 kHz for f
SCL
up to 400 kHz
Second-Order Terms
Third-Order Terms
Aperture Delay
2
Aperture Jitter
2
Channel-to-Channel Isolation
2
Full-Power Bandwidth
2
DC ACCURACY
Resolution
Integral Nonlinearity
1, 2
Differential Nonlinearity
1, 2
Offset Error
2
Offset Error Match
2
Gain Error
2
Gain Error Match
2
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REF
IN
Input Voltage Range
DC Leakage Current
Input Impedance
LOGIC INPUTS (SDA, SCL)
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current, I
IN
Input Capacitance, C
IN 3
Input Hysteresis, V
HYST
–86
–86
10
50
–90
11
2
10
±0.5
±0.5
±1.5
±2.5
±0.5
±1.5
±0.5
0 to REF
IN
±1
30
1.2 to V
DD
±1
69
0.7 (V
DD
)
0.3 (V
DD
)
±1
10
0.1 (V
DD
)
dB typ
dB typ
ns max
ps typ
dB typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
V
µA max
pF typ
V min/V max
µA max
kΩ typ
V min
V max
µA max
pF max
V min
F
IN
= 108 Hz, see the Terminology section
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 10 bits
Mode 1 (CONVST Mode)
Mode 2 (Command Mode)
During a conversion
V
IN
= 0 V or V
DD
Rev. 0 | Page 3 of 32
AD7997/AD7998
Parameter
LOGIC INPUTS (CONVST)
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current, I
IN
Input Capacitance, C
IN3
LOGIC OUTPUTS (OPEN-DRAIN)
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
3
Output Coding
CONVERSION RATE
Conversion Time
Throughput Rate
Mode 1 (Reading after the Conversion)
B Version
2.4
2.0
0.8
0.4
±1
10
0.4
0.6
±1
10
Unit
V min
V min
V max
V max
µA max
pF max
V max
V max
µA max
pF max
Straight (Natural) Binary
µs typ
kSPS typ
kSPS typ
kSPS typ
kSPS typ
kSPS typ
kSPS typ
V min/max
µA max
mA max
mA max
mA max
mA max
mA max
mA max
mA typ
mA max
Digital inputs = 0 V or V
DD
V
DD
= 3.3 V/5.5 V
V
DD
= 3.3 V/5.5 V, 400 kHz f
SCL
V
DD
= 3.3 V/5.5 V, 3.4 MHz f
SCL
V
DD
= 3.3 V/5.5 V, 400 kHz f
SCL
V
DD
= 3.3 V/5.5 V, 3.4 MHz f
SCL
V
DD
= 3.3 V/5.5 V, 400 kHz f
SCL
V
DD
= 3.3 V/5.5 V, 3.4 MHz f
SCL
Mode 1
V
DD
= 3.3 V/5.5 V, 3.4 MHz f
SCL
Mode 2
V
DD
= 3.3 V/5.5 V
f
SCL
= 100 kHz
f
SCL
= 400 kHz
f
SCL
= 3.4 MHz
f
SCL
= 100 kHz
f
SCL
= 400 kHz
f
SCL
= 3.4 MHz, 188 kSPS typ @ 5 V
Test Conditions/Comments
V
DD
= 5 V
V
DD
= 3 V
V
DD
= 5 V
V
DD
= 3 V
V
IN
= 0 V or V
DD
I
SINK
= 3 mA
I
SINK
= 6 mA
See the Modes of Operation section
2
5
21
121
5.5
22
147
2.7/5.5
1/2
0.07/0.3
0.3/0.6
0.06/0.1
0.3/0.6
0.15/0.4
0.6/1.1
0.7/1.4
0.7/1.5
Mode 2
POWER REQUIREMENTS
V
DD
I
DD
Power-Down Mode, Interface Inactive
Power-Down Mode, Interface Active
Operating, Interface Inactive
Operating, Interface Active
Mode 3 (I
2
C Inactive, T
CONVERT
x 32)
Power Dissipation
Fully Operational
Operating, Interface Active
Power Down, Interface Inactive
0.495/2.2
1.98/6.05
2.31/7.7
3.3/11
mW max
mW max
mW typ
µW max
V
DD
= 3.3 V/5.5 V, 400 kHz f
SCL
V
DD
= 3.3 V/5.5 V, 3.4 MHz f
SCL
Mode 1
V
DD
= 3.3 V/5.5 V, 3.4 MHz f
SCL
Mode 2
V
DD
= 3.3 V/5.5 V
Max/min ac dynamic performance, INL and DNL specifications are typical specifications when operating in Mode 2 with I
2
C Hs-Mode SCL frequencies. Specifications
outlined for Mode 2 apply to Mode 3 also. Sample delay and bit trial delay enabled.
2
See the Terminology section.
3
Guaranteed by initial characterization.
1
Rev. 0 | Page 4 of 32
AD7997/AD7998
AD7998 SPECIFICATIONS
Temperature range for B version is −40°C to +85°C. Unless otherwise noted, V
DD
= 2.7 V to 5.5 V; REF
IN
= 2.5 V; For the AD7998-0, all
specifications apply for f
SCL
up to 400 kHz; for the AD7998-1, all specifications apply for f
SCL
up to 3.4 MHz, unless otherwise noted;
T
A
= T
MIN
to T
MAX
.
Table 2.
Parameter
DYNAMIC PERFORMANCE
1
B Version
Unit
Test Conditions/Comments
F
IN
= 10 kHz sine wave for f
SCL
from 1.7 MHz to
3.4 MHz
F
IN
= 1 kHz sine wave for f
SCL
up to 400 kHz
Signal-to-Noise + Distortion (SINAD)
2
Signal to Noise Ratio (SNR)
2
Total Harmonic Distortion (THD)
2
Peak Harmonic or Spurious Noise (SFDR)
2
Intermodulation Distortion (IMD)
2
70.5
71
–78
–79
dB min
dB min
dB max
dB max
fa = 10.1 kHz, fb = 9.9 kHz f
SCL
from 1.7 MHz to
3.4 MHz
fa = 1.1 kHz, fb = 0.9 kHz for f
SCL
up to 400 kHz
Second-Order Terms
Third-Order Terms
Aperture Delay
2
Aperture Jitter
2
Channel-to-Channel Isolation
2
Full-Power Bandwidth
2
DC ACCURACY
Resolution
Integral Nonlinearity
1,2
Differential Nonlinearity
1,2
Offset Error
2
Offset Error Match
2
Gain Error
2
Gain Error Match
2
ANALOG INPUT
Input Voltage Range
DC Leakage Current
Input Capacitance
REFERENCE INPUT
REF
IN
Input Voltage Range
DC Leakage Current
Input Impedance
LOGIC INPUTS (SDA, SCL)
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current, I
IN
Input Capacitance, C
IN 3
Input Hysteresis, V
HYST
–90
–90
10
50
–90
11
2
12
±1
±0.2
+1/–0.9
±0.2
±4
±6
±1
±2
±1
0 to REF
IN
±1
30
1.2 to V
DD
±1
69
0.7 (V
DD
)
0.3 (V
DD
)
±1
10
0.1 (V
DD
)
dB typ
dB typ
ns max
ps typ
dB typ
MHz typ
MHz typ
Bits
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB max
LSB max
LSB max
LSB max
V
µA max
pF typ
V min/V max
µA max
kΩ typ
V min
V max
µA max
pF max
V min
F
IN
= 108 Hz, see the Terminology section
@ 3 dB
@ 0.1 dB
Guaranteed no missed codes to 12 bits
Mode 1 (CONVST Mode)
Mode 2 (Command Mode)
V
IN
= 0 V or V
DD
Rev. 0 | Page 5 of 32
