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AD8138AAR-EBZ

BOARD EVAL FOR AD8138AAR

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厂商名称:ADI(亚德诺半导体)

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器件参数
参数名称
属性值
每 IC 通道数
1 - 单
放大器类型
差分
板类型
裸(未填充)
所含物品
使用的 IC/零件
8-SOIC 封装
文档预览
Data Sheet
FEATURES
Easy to use, single-ended-to-differential conversion
Adjustable output common-mode voltage
Externally adjustable gain
Low harmonic distortion
−94 dBc SFDR at 5 MHz
−85 dBc SFDR at 20 MHz
−3 dB bandwidth of 320 MHz, G = +1
Fast settling to 0.01% of 16 ns
Slew rate 1150 V/µs
Fast overdrive recovery of 4 ns
Low input voltage noise of 5 nV/√Hz
1 mV typical offset voltage
Wide supply range +3 V to ±5 V
Low power 90 mW on 5 V
0.1 dB gain flatness to 40 MHz
Available in 8-Lead SOIC and MSOP packages
Low Distortion,
Differential ADC Driver
AD8138
PIN CONFIGURATION
–IN
1
V
OCM 2
V+
3
+OUT
4
8
7
6
+IN
NC
V–
01073-001
AD8138
5
–OUT
NC = NO CONNECT
Figure 1.
TYPICAL APPLICATION CIRCUIT
5V
499Ω
V
IN
499Ω
V
OCM
499Ω
+
AVDD
DVDD
DIGITAL
OUTPUTS
V
REF
01073-002
5V
AIN
AIN
AD8138
499Ω
ADC
AVSS
Figure 2.
APPLICATIONS
ADC drivers
Single-ended-to-differential converters
IF and baseband gain blocks
Differential buffers
Line drivers
GENERAL DESCRIPTION
The
AD8138
is a major advancement over op amps for
differential signal processing. The
AD8138
can be used as a
single-ended-to-differential amplifier or as a differential-to-
differential amplifier. The
AD8138
is as easy to use as an op
amp and greatly simplifies differential signal amplification and
driving. Manufactured on the proprietary ADI XFCB bipolar
process, the
AD8138
has a −3 dB bandwidth of 320 MHz and
delivers a differential signal with the lowest harmonic distortion
available in a differential amplifier. The
AD8138
has a unique
internal feedback feature that provides balanced output gain
and phase matching, suppressing even order harmonics. The
internal feedback circuit also minimizes any gain error that
would be associated with the mismatches in the external gain
setting resistors.
The differential output of the
AD8138
helps balance the input
to differential ADCs, maximizing the performance of the ADC.
The
AD8138
eliminates the need for a transformer with high
performance ADCs, preserving the low frequency and dc infor-
mation. The common-mode level of the differential output is
adjustable by a voltage on the V
OCM
pin, easily level-shifting the
input signals for driving single-supply ADCs. Fast overload
recovery preserves sampling accuracy.
The
AD8138
distortion performance makes it an ideal ADC
driver for communication systems, with distortion performance
good enough to drive state-of-the-art 10-bit to 16-bit converters
at high frequencies. The high bandwidth and IP3 of the
AD8138
also make it appropriate for use as a gain block in IF
and baseband signal chains. The
AD8138
offset and dynamic
performance makes it well suited for a wide variety of signal
processing and data acquisition applications.
The
AD8138
is available in both SOIC and MSOP packages for
operation over −40°C to +85°C temperatures.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1999–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
AD8138
TABLE OF CONTENTS
Features .............................................................................................. 1
 
Applications ....................................................................................... 1
 
Pin Configuration ............................................................................. 1
 
Typical Application Circuit ............................................................. 1
 
General Description ......................................................................... 1
 
Revision History ............................................................................... 2
 
Specifications..................................................................................... 3
 
±D
IN
to ±OUT Specifications...................................................... 3
 
V
OCM
to ±OUT Specifications ..................................................... 4
 
±D
IN
to ±OUT Specifications...................................................... 5
 
V
OCM
to ±OUT Specifications ..................................................... 6
 
Absolute Maximum Ratings............................................................ 7
 
Thermal Resistance ...................................................................... 7
 
ESD Caution .................................................................................. 7
 
Pin Configuration and Function Descriptions ............................. 8
 
Typical Performance Characteristics ............................................. 9
 
Test Circuits ..................................................................................... 15
 
Operational Description ................................................................ 16
 
Data Sheet
Definition of Terms .................................................................... 16
 
Theory of Operation ...................................................................... 17
 
Analyzing an Application Circuit ............................................ 17
 
Setting the Closed-Loop Gain .................................................. 17
 
Estimating the Output Noise Voltage ...................................... 17
 
The Impact of Mismatches in the Feedback Networks ......... 18
 
Calculating the Input Impedance of an Application ............. 18
 
Input Common-Mode Voltage Range in Single-Supply
Applications ................................................................................ 18
 
Setting the Output Common-Mode Voltage .......................... 18
 
Driving a Capacitive Load......................................................... 18
 
Layout, Grounding, and Bypassing .............................................. 19
 
Balanced Transformer Driver ....................................................... 20
 
High Performance ADC Driving ................................................. 21
 
3 V Operation ................................................................................. 22
 
Outline Dimensions ....................................................................... 23
 
Ordering Guide .......................................................................... 23
 
REVISION HISTORY
3/16—Rev. F to Rev. G
Changes to Setting the Closed-Loop Gain Section .................... 17
Changes to Figure 46 ...................................................................... 21
Changes to Figure 47 ...................................................................... 22
1/06—Rev. E to Rev. F
Changes to Features.......................................................................... 1
Added Thermal Resistance Section and Maximum Power
Dissipation Section ........................................................................... 7
Changes to Balanced Transformer Driver Section..................... 20
Changes to Ordering Guide .......................................................... 23
3/03—Rev. D to Rev. E
Changes to Specifications ................................................................ 2
Changes to Ordering Guide ............................................................ 4
Changes to TPC 16 ........................................................................... 6
Changes to Table I ............................................................................ 9
Added New Paragraph after Table I ............................................. 10
Updated Outline Dimensions ....................................................... 14
7/02—Rev. C to Rev. D
Addition of TPC 35 and TPC 36 .....................................................8
6/01—Rev. B to Rev. C
Edits to Specifications ......................................................................2
Edits to Ordering Guide ...................................................................4
12/00—Rev. A to Rev. B
9/99—Rev. 0 to Rev. A
3/99—Rev. 0: Initial Version
Rev. G | Page 2 of 24
Data Sheet
SPECIFICATIONS
±D
IN
TO ±OUT SPECIFICATIONS
AD8138
At 25°C, V
S
= ±5 V, V
OCM
= 0, G = +1, R
L, dm
= 500 Ω, unless otherwise noted. Refer to Figure 39 for test setup and label descriptions. All
specifications refer to single-ended input and differential outputs, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
Slew Rate
Settling Time
Overdrive Recovery Time
NOISE/HARMONIC PERFORMANCE
1
Second Harmonic
Conditions
V
OUT
= 0.5 V p-p, C
F
= 0 pF
V
OUT
= 0.5 V p-p, C
F
= 1 pF
V
OUT
= 0.5 V p-p, C
F
= 0 pF
V
OUT
= 2 V p-p, C
F
= 0 pF
V
OUT
= 2 V p-p, C
F
= 0 pF
0.01%, V
OUT
= 2 V p-p, C
F
= 1 pF
V
IN
= 5 V to 0 V step, G = +2
V
OUT
= 2 V p-p, 5 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 20 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 70 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 5 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 20 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 70 MHz, R
L, dm
= 800 Ω
20 MHz
20 MHz
f = 100 kHz to 40 MHz
f = 100 kHz to 40 MHz
V
OS, dm
= V
OUT, dm
/2; V
DIN+
= V
DIN−
= V
OCM
= 0 V
T
MIN
to T
MAX
variation
T
MIN
to T
MAX
variation
Differential
Common mode
−2.5
Min
290
Typ
320
225
30
265
1150
16
4
−94
−87
−62
−114
−85
−57
−77
37
5
2
±1
±4
3.5
−0.01
6
3
1
−4.7 to +3.4
−77
7.75
95
−66
+2.5
7
Max
Unit
MHz
MHz
MHz
MHz
V/µs
ns
ns
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBm
nV/√Hz
pA/√Hz
mV
µV/°C
µA
µA/°C
MΩ
MΩ
pF
V
dB
V p-p
mA
dB
Third Harmonic
IMD
IP3
Voltage Noise (RTI)
Input Current Noise
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Resistance
Input Capacitance
Input Common-Mode Voltage
CMRR
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
Output Balance Error
1
∆V
OUT, dm
/∆V
IN, cm
; ∆V
IN, cm
= ±1 V
Maximum ∆V
OUT
; single-ended output
∆V
OUT, cm
/∆V
OUT, dm
; ∆V
OUT, dm
= 1 V
−70
Harmonic distortion performance is equal or slightly worse with higher values of R
L, dm
. See Figure 17 and Figure 18 for more information.
Rev. G | Page 3 of 24
AD8138
V
OCM
TO ±OUT SPECIFICATIONS
Data Sheet
At 25°C, V
S
= ±5 V, V
OCM
= 0, G = +1, R
L, dm
= 500 Ω, unless otherwise noted. Refer to Figure 39 for test setup and label descriptions. All
specifications refer to single-ended input and differential outputs, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Slew Rate
INPUT VOLTAGE NOISE (RTI)
DC PERFORMANCE
Input Voltage Range
Input Resistance
Input Offset Voltage
Input Bias Current
V
OCM
CMRR
Gain
POWER SUPPLY
Operating Range
Quiescent Current
Power Supply Rejection Ratio
OPERATING TEMPERATURE RANGE
Conditions
Min
Typ
250
330
17
±3.8
200
±1
0.5
−75
1
Max
Unit
MHz
V/µs
nV/√Hz
V
kΩ
mV
µA
dB
V/V
V
mA
µA/°C
dB
°C
f = 0.1 MHz to 100 MHz
V
OS, cm
= V
OUT, cm
; V
DIN+
= V
DIN–
= V
OCM
= 0 V
∆V
OUT, dm
/∆V
OCM
; ∆V
OCM
= ±1 V
∆V
OUT, cm
/∆V
OCM
; ∆V
OCM
= ±1 V
–3.5
+3.5
0.9955
±1.4
18
1.0045
±5.5
23
−70
+85
T
MIN
to T
MAX
variation
∆V
OUT, dm
/∆V
S
; ∆V
S
= ±1 V
−40
20
40
−90
Rev. G | Page 4 of 24
Data Sheet
±D
IN
TO ±OUT SPECIFICATIONS
AD8138
At 25°C, V
S
= 5 V, V
OCM
= 2.5 V, G = +1, R
L, dm
= 500 Ω, unless otherwise noted. Refer to Figure 39 for test setup and label descriptions. All
specifications refer to single-ended input and differential output, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Bandwidth for 0.1 dB Flatness
Large Signal Bandwidth
Slew Rate
Settling Time
Overdrive Recovery Time
NOISE/HARMONIC PERFORMANCE
1
Second Harmonic
Conditions
V
OUT
= 0.5 V p-p, C
F
= 0 pF
V
OUT
= 0.5 V p-p, C
F
= 1 pF
V
OUT
= 0.5 V p-p, C
F
= 0 pF
V
OUT
= 2 V p-p, C
F
= 0 pF
V
OUT
= 2 V p-p, C
F
= 0 pF
0.01%, V
OUT
= 2 V p-p, C
F
= 1 pF
V
IN
= 2.5 V to 0 V step, G = +2
V
OUT
= 2 V p-p, 5 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 20 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 70 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 5 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 20 MHz, R
L, dm
= 800 Ω
V
OUT
= 2 V p-p, 70 MHz, R
L, dm
= 800 Ω
20 MHz
20 MHz
f = 100 kHz to 40 MHz
f = 100 kHz to 40 MHz
V
OS, dm
= V
OUT, dm
/2; V
DIN+
= V
DIN–
= V
OCM
= 0 V
T
MIN
to T
MAX
variation
T
MIN
to T
MAX
variation
Differential
Common mode
−2.5
Min
280
Typ
310
225
29
265
950
16
4
−90
−79
−60
−100
−82
−53
−74
35
5
2
±1
±4
3.5
−0.01
6
3
1
−0.3 to +3.2
−77
2.9
95
−65
+2.5
7
Max
Unit
MHz
MHz
MHz
MHz
V/µs
ns
ns
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBm
nV/√Hz
pA/√Hz
mV
µV/°C
µA
µA/°C
MΩ
MΩ
pF
V
dB
V p-p
mA
dB
Third Harmonic
IMD
IP3
Voltage Noise (RTI)
Input Current Noise
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Resistance
Input Capacitance
Input Common-Mode Voltage
CMRR
OUTPUT CHARACTERISTICS
Output Voltage Swing
Output Current
Output Balance Error
1
∆V
OUT, dm
/∆V
IN, cm
; ∆V
IN, cm
= 1 V
Maximum ∆V
OUT
; single-ended output
∆V
OUT, cm
/∆V
OUT, dm
; ∆V
OUT, dm
= 1 V
−70
Harmonic distortion performance is equal or slightly worse with higher values of R
L, dm
. See Figure 17 and Figure 18 for more information.
Rev. G | Page 5 of 24
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参数对比
与AD8138AAR-EBZ相近的元器件有:AD8138ARM-EBZ、AD8138ARZ-R7、AD8138ARMZ-REEL7。描述及对比如下:
型号 AD8138AAR-EBZ AD8138ARM-EBZ AD8138ARZ-R7 AD8138ARMZ-REEL7
描述 BOARD EVAL FOR AD8138AAR EVAL BOARD FOR 8MSOP SP Amp DIFF AMP Single ±5.5V/11V 8-Pin SOIC N T/R SP Amp DIFF AMP Single ±5.5V/11V 8-Pin MSOP T/R
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