Dual/Quad Low Power, High Speed
JFET Operational Amplifiers
AD8682/AD8684
FEATURES
Low supply current: 250 μA/amp maximum
High slew rate: 9 V/μs
Bandwidth: 3.5 MHz typical
Low offset voltage: 1 mV maximum @ 25°C
Low input bias current: 20 pA maximum @ 25°C
CMRR: 90 dB typical
Fast settling time
Unity-gain stable
PIN CONFIGURATIONS
OUT A
1
–IN A
2
+IN A
3
V–
4
8
V+
OUT B
+IN B
06278-001
06278-002
AD8682
TOP VIEW
(Not to Scale)
7
6
5
–IN B
Figure 1. 8-Lead SOIC_N and 8-Lead MSOP
OUT A
1
–IN A
2
+IN A
3
V+
4
+IN B
5
–IN B
6
OUT B
7
TOP VIEW
(Not to Scale)
14
13
12
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
APPLICATIONS
Portable telecommunications
Low power industrial and instrumentation
Loop filters
Active and precision filters
Integrators
Strain gauge amplifiers
Portable medical instrumentation
Supply current monitoring
AD8684
11
10
9
8
Figure 2. 14-Lead SOIC_N and 14-Lead TSSOP
GENERAL DESCRIPTION
The AD8682 and AD8684 are dual and quad low power, precision
(1 mV) JFET amplifiers featuring excellent speed at low supply
currents. The slew rate is typically 9 V/μs with a supply current
under 250 μA per amplifier. These unity-gain stable amplifiers
have a typical gain bandwidth of 3.5 MHz. The JFET input stage
ensures bias current is typically a few picoamps and below
125 pA maximum over the full temperature operating range.
The devices are ideal for portable, low power applications,
especially with high source impedance. The devices are unity-gain
stable and can drive higher capacity loads (G = 1, noninverting),
as an example of their excellent dynamic response over a wide
range of conditions, delivering dc precision performance at low
quiescent currents.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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Fax: 781.461.3113 ©2006–2008 Analog Devices, Inc. All rights reserved.
AD8682/AD8684
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution...................................................................................4
Typical Performance Characteristics ..............................................5
Applications Information .............................................................. 10
High-Side Signal Conditioning ................................................ 10
Phase Inversion ........................................................................... 10
Active Filters ............................................................................... 10
Programmable State Variable Filter ......................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 14
REVISION HISTORY
7/08—Rev. A to Rev. B
Changes to Phase Inversion Section ............................................ 10
Deleted Figure 33 ............................................................................ 10
Added Figure 33 and Figure 34..................................................... 10
Updated Outline Dimensions ....................................................... 12
7/07—Rev. 0 to Rev. A
Change to Figure 21 ......................................................................... 8
Change to Figure 31 ......................................................................... 9
10/06—Revision 0: Initial Version
Rev. B | Page 2 of 16
AD8682/AD8684
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
V
S
= ±15.0 V, T
A
= 25°C, V
CM
= 0 V, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
AD8682
AD8684
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
Bias Current Drift
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
Open-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
Supply Voltage Range
DYNAMIC PERFORMANCE
Slew Rate
Full-Power Bandwidth
Settling Time
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
I
B
−40°C ≤ T
A
≤ +85°C
I
OS
−40°C ≤ T
A
≤ +85°C
CMRR
A
VO
ΔV
OS
/ΔT
ΔI
B
/ΔT
V
OH
V
OL
I
SC
Z
OUT
PSRR
I
SY
V
S
SR
BW
P
t
S
GBP
Ø
M
e
n
p-p
e
n
i
n
R
L
= 10 kΩ
R
L
= 10 kΩ
Source
Sink
f = 1 MHz
V
S
= ±4.5 V to ±18 V, −40°C ≤ T
A
≤ +85°C
V
O
= 0 V, −40°C ≤ T
A
≤ +85°C
13.5
3
−11 V ≤ V
CM
≤ +15 V, −40°C ≤ T
A
≤ +85°C
R
L
= 10 kΩ
R
L
= 10 kΩ, −40°C ≤ T
A
≤ +85°C
−11
70
20
15
90
Symbol
V
OS
+25°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +25°C
+25°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +25°C
6
Conditions
Min
Typ
0.35
Max
1
2.5
3
3.5
4
20
125
20
100
+15
Unit
mV
mV
mV
mV
mV
pA
pA
pA
pA
V
dB
V/mV
V/mV
μV/°C
pA/°C
V
V
mA
mA
Ω
dB
μA
V
V/μs
kHz
μs
MHz
Degrees
μV p-p
nV/√Hz
pA/√Hz
10
8
13.9
−13.9
10
−12
200
114
210
−13.5
−8
92
±4.5
250
±18
R
L
= 10 kΩ
1% distortion
To 0.01%
7
9
125
1.6
3.5
55
1.3
36
0.01
0.1 Hz to 10 Hz
f = 1 kHz
Rev. B | Page 3 of 16
AD8682/AD8684
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
1
Output Short-Circuit Duration
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
1
THERMAL RESISTANCE
Rating
±18 V
±18 V
36 V
Indefinite
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
Table 3.
Package Type
8-Lead MSOP [RM-8]
8-Lead SOIC_N [R-8]
14-Lead TSSOP [RU-14]
14-Lead SOIC_N [R-14]
θ
JA
210
158
180
120
θ
JC
45
43
35
36
Unit
°C/W
°C/W
°C/W
°C/W
ESD CAUTION
For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. B | Page 4 of 16
AD8682/AD8684
TYPICAL PERFORMANCE CHARACTERISTICS
80
V
S
= ±15V
T
A
= 25°C
180
70
60
V
S
= ±15V
T
A
= 25°C
60
OPEN-LOOP GAIN (dB)
135
50
CLOSED-LOOP GAIN (dB)
40
90
PHASE (Degree)
40
30
20
10
0
–10
–20
A
VCL
= 100
20
45
A
VCL
= 10
0
0
A
VCL
= 1
–20
–45
06278-003
10k
100k
FREQUENCY (Hz)
1M
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 3. AD8682 Open-Loop Gain and Phase vs. Frequency
Figure 6. AD8682 Closed-Loop Gain vs. Frequency
45
40
35
V
S
= ±15V
R
L
= 10kΩ
30
25
V
S
= ±15V
R
L
= 10kΩ
C
L
= 50pF
–SR
OPEN-LOOP GAIN (V/mV)
25
20
15
10
SLEW RATE (V/µs)
30
20
15
10
+SR
5
5
06278-004
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 4. AD8682 Open-Loop Gain vs. Temperature
Figure 7. Slew Rate vs. Temperature
80
OVERSHOOT (%)
+OS
50
40
30
20
10
06278-005
–OS
INPUT BIAS CURRENT (pA)
V
S
= ±15V
R
L
= 2kΩ
70 V = 100mV p-p
IN
A
VCL
= 1
60
T
A
= 25°C
1000
V
S
= ±15V
V
CM
= 0V
100
10
1
0
100
200
300
400
500
–50
–25
0
25
50
75
100
125
LOAD CAPACITANCE (pF)
TEMPERATURE (°C)
Figure 5. Small Signal Overshoot vs. Load Capacitance
Figure 8. AD8682 Input Bias Current vs. Temperature
Rev. B | Page 5 of 16
06278-008
0
0.1
–75
06278-007
0
–75
0
–75
06278-006
–40
1k
–90
10M
–30
1k