AN-302: Exploit Digital Advantages in an SSB Receiver
•
AN-345: Grounding for Low-and-High-Frequency Circuits
•
AN-501: Aperture Uncertainty and ADC System
Performance
•
AN-715: A First Approach to IBIS Models: What They Are
and How They Are Generated
•
AN-737: How ADIsimADC Models an ADC
•
AN-741: Little Known Characteristics of Phase Noise
•
AN-756: Sampled Systems and the Effects of Clock Phase
Noise and Jitter
•
AN-835: Understanding High Speed ADC Testing and
Evaluation
•
AN-905: Visual Analog Converter Evaluation Tool Version
1.0 User Manual
•
AN-935: Designing an ADC Transformer-Coupled Front
End
Data Sheet
•
AD9283: 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D
Converter Data Sheet
User Guides
•
UG-173: High Speed ADC USB FIFO Evaluation Kit (HSC-
ADC-EVALB-DCZ)
REFERENCE MATERIALS
Technical Articles
•
Correlating High-Speed ADC Performance to Multicarrier
3G Requirements
•
DNL and Some of its Effects on Converter Performance
•
MS-2210: Designing Power Supplies for High Speed ADC
DESIGN RESOURCES
•
AD9283 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
DISCUSSIONS
View all AD9283 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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AD9283–SPECIFICATIONS
(V
Parameter
RESOLUTION
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
No Missing Codes
Gain Error
1
Gain Tempco
1
ANALOG INPUT
Input Voltage Range
(With Respect to A
IN
)
Common-Mode Voltage
Input Offset Voltage
Reference Voltage
Reference Tempco
Input Resistance
Input Capacitance
Analog Bandwidth, Full Power
SWITCHING PERFORMANCE
Maximum Conversion Rate
Minimum Conversion Rate
Encode Pulsewidth High (t
EH
)
Encode Pulsewidth Low (t
EL
)
Aperture Delay (t
A
)
Aperture Uncertainty (Jitter)
Output Valid Time (t
V
)
2
Output Propagation Delay (t
PD
)
2
DIGITAL INPUTS
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current
Logic “0” Current
Input Capacitance
DIGITAL OUTPUTS
Logic “1” Voltage
Logic “0” Voltage
Output Coding
POWER SUPPLY
Power Dissipation
3, 4
Power-Down Dissipation
Power Supply Rejection Ratio
(PSRR)
25°C
Full
25°C
Full
Full
25°C
Full
Full
I
VI
I
VI
VI
I
VI
VI
Temp
Test
Level
DD
= 3.0 V, V
D
= 3.0 V; single-ended input; external
reference, unless otherwise noted)
AD9283BRS-50
Min
Typ
Max
8
Unit
Bits
+1.25
+1.50
+1.25
+1.50
+6
+8
LSB
LSB
LSB
LSB
% FS
% FS
ppm/°C
AD9283BRS-100
Min
Typ
Max
8
±
0.5
–1.25
±
0.75
+1.25
+1.50
+1.25
+2.25
+6
+8
AD9283BRS-80
Min
Typ
Max
8
±
0.5
–1.25
±
0.75
+1.25
+1.50
+1.25
+1.50
+6
+8
±
0.5
–1.25
±
0.75
Guaranteed
–6
±
2.5
–8
80
–6
–8
Guaranteed
±
2.5
80
–6
–8
Guaranteed
±
2.5
80
Full
Full
25°C
Full
Full
Full
25°C
Full
25°C
Full
25°C
Full
25°C
25°C
25°C
25°C
25°C
Full
Full
Full
Full
Full
Full
25°C
Full
Full
V
V
I
VI
VI
VI
I
VI
V
VI
V
VI
IV
IV
IV
V
V
VI
VI
VI
VI
VI
VI
V
VI
VI
–35
1.2
7
5
±
512
±
200
±
10
±
40
1.25
±
130
10
2
475
+35
1.3
13
16
–35
1.2
7
5
±
512
±
200
±
10
±
40
1.25
±
130
10
2
475
+35
1.3
13
16
–35
1.2
7
5
±
512
±
200
±
10
±
40
1.25
±
130
10
2
475
+35
1.3
13
16
mV p-p
mV
mV
mV
V
ppm/°C
kΩ
kΩ
pF
µA
MHz
MSPS
MSPS
ns
ns
ns
ps rms
ns
ns
V
V
µA
µA
pF
V
V
100
4.3
4.3
0
5
3.0
4.5
1
1000
1000
80
5.0
5.0
0
5
3.0
4.5
1
1000
1000
50
8.0
8.0
0
5
3.0
4.5
1
1000
1000
2.0
2.0
7.0
2.0
0.8
±
1
±
1
2.0
7.0
2.0
0.8
±
1
±
1
7.0
2.0
0.8
±
1
±
1
2.0
2.95
0.05
Offset Binary Code
80
4.2
100
7
18
2.0
2.95
0.05
Offset Binary Code
90
4.2
120
7
18
2.95
2.0
0.05
Offset Binary Code
90
4.2
115
7
18
Full
Full
25°C
VI
VI
I
mW
mW
mV/V
–2–
REV. C
AD9283
Parameter
DYNAMIC PERFORMANCE
5
Transient Response
Overvoltage Recovery Time
Signal-to-Noise Ratio (SNR)
(Without Harmonics)
f
IN
= 10.3 MHz
f
IN
= 27 MHz
f
IN
= 41 MHz
f
IN
= 76 MHz
Signal-to-Noise Ratio (SINAD)
(With Harmonics)
f
IN
= 10.3 MHz
f
IN
= 27 MHz
f
IN
= 41 MHz
f
IN
= 76 MHz
Effective Number of Bits
f
IN
= 10.3 MHz
f
IN
= 27 MHz
f
IN
= 41 MHz
f
IN
= 76 MHz
2nd Harmonic Distortion
f
IN
= 10.3 MHz
f
IN
= 27 MHz
f
IN
= 41 MHz
f
IN
= 76 MHz
3rd Harmonic Distortion
f
IN
= 10.3 MHz
f
IN
= 27 MHz
f
IN
= 41 MHz
f
IN
= 76 MHz
Two-Tone Intermod Distortion
(IMD)
f
IN
= 10.3 MHz
Temp
25°C
25°C
Test
Level
V
V
AD9283BRS-100
Min Typ Max
2
2
AD9283BRS-80
Min Typ Max
2
2
AD9283BRS-50
Min Typ Max
2
2
Unit
ns
ns
25°C
25°C
25°C
25°C
I
I
I
V
46.5
46.5
43.5 46.5
46.0
44
47
47
47
44
47
47
dB
dB
dB
dB
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
I
I
I
V
I
I
I
V
I
I
I
V
I
I
I
V
45
45.5
42.5 45
42.5
7.3
7.4
7.3
6.9
57
60
58
46
54.5
55
52.5
53
47
43.5 46.5
42
43.5 46.5
46
dB
dB
dB
dB
Bits
Bits
Bits
Bits
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
7.5
7.5
7.5
7.6
7.5
55
50
60
60
55
55
60
56
55
47
70
62.5
60
55
70
60
25°C
V
52
52
52
dBc
NOTES
1
Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.25 V external reference).
2
t
V
and t
PD
are measured from the 1.5 V level of the ENCODE input to the 50%/50% levels of the digital outputs swing. The digital output load during test is not to
exceed an ac load of 10 pF or a dc current of
±
40
µA.
3
Power dissipation measured with encode at rated speed and a dc analog input.
4
Typical thermal impedance for the RS style (SSOP) 20-lead package:
θ
JC
= 46°C/W,
θ
CA
= 80°C/W,
θ
JA
= 126°C/W.
5
SNR/harmonics based on an analog input voltage of –0.7 dBFS referenced to a 1.024 V full-scale input range.
模拟与混合信号
