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AD977CNZ

3-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP20, 0.300 INCH, PLASTIC, DIP-20

器件类别:模拟混合信号IC    转换器   

厂商名称:Rochester Electronics

厂商官网:https://www.rocelec.com/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
零件包装代码
DIP
包装说明
DIP,
针数
20
Reach Compliance Code
unknown
最大模拟输入电压
10 V
最小模拟输入电压
-10 V
最长转换时间
8 µs
转换器类型
ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码
R-PDIP-T20
JESD-609代码
e3
长度
25.2 mm
湿度敏感等级
NOT APPLICABLE
模拟输入通道数量
3
位数
16
功能数量
1
端子数量
20
最高工作温度
85 °C
最低工作温度
-40 °C
输出位码
BINARY, 2'S COMPLEMENT BINARY
输出格式
SERIAL
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT APPLICABLE
采样速率
0.1 MHz
座面最大高度
5.33 mm
标称供电电压
5 V
表面贴装
NO
技术
BICMOS
温度等级
INDUSTRIAL
端子面层
MATTE TIN
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT APPLICABLE
宽度
7.62 mm
Base Number Matches
1
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FEATURES
Fast 16-Bit ADC
100 kSPS Throughput Rate—AD977
200 kSPS Throughput Rate—AD977A
Single 5 V Supply Operation
Power Dissipation 100 mW Max
Power-Down Mode 50 W
Input Ranges:
Unipolar; 0 V–10 V, 0 V–5 V and 0 V–4 V
Bipolar; 10 V, 5 V and 3.3 V
Choice of External or Internal 2.5 V Reference
High Speed Serial Interface
On-Chip Clock
20-Lead Skinny DIP or SOIC Package
28-Lead Skinny SSOP Package
CAP
R1
IN
R2
IN
R3
IN
AGND2
V
DIG
16-Bit, 100 kSPS/200 kSPS
BiCMOS A/D Converter
AD977/AD977A
FUNCTIONAL BLOCK DIAGRAM
REF
4k
4R
2R
R
4R
SWITCHED
CAP ADC
V
ANA
AGND1
2.5V
REFERENCE
AD977/
AD977A
SYNC
SERIAL
DATA
INTERFACE
BUSY
DATACLK
DATA
R = 5k AD977
R = 2.5k AD977A
CONTROL LOGIC &
INTERNAL CALIBRATION CIRCUITRY
CLOCK
DGND
PWRD
R/C
CS
TAG
SB/BTC EXT/INT
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD977/AD977A is a high speed, low power 16-bit A/D
converter that operates from a single 5 V supply. The AD977A
has a throughput rate of 200 kSPS whereas the AD977 has a
throughput rate of 100 kSPS. Each part contains a successive
approximation, switched capacitor ADC, an internal 2.5 V
reference, and a high speed serial interface. The ADC is factory
calibrated to minimize all linearity errors. The AD977/AD977A is
specified for full scale bipolar input ranges of
±
10 V,
±
5 V and
±
3.3 V, and unipolar ranges of 0 V to 10 V, 0 V to 5 V and
0 V to 4 V.
The AD977/AD977A is comprehensively tested for ac param-
eters such as SNR and THD, as well as the more traditional dc
parameters of offset, gain and linearity.
1. Fast Throughput
The AD977/AD977A is a high speed, 16-bit ADC based on
a factory calibrated switched capacitor architecture.
2. Single-Supply Operation
The AD977/AD977A operates from a single 5 V supply and
dissipates only 100 mW max.
3. Comprehensive DC and AC Specifications
In addition to the traditional specifications of offset, gain
and linearity, the AD977/AD977A is fully tested for SNR
and THD.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD977/AD977A
AD977–SPECIFICATIONS
(–40 C to +85 C, F = 100 kHz, V
S
DIG
= V
ANA
= 5 V, unless otherwise noted)
Max
Min
16
C Grade
Typ Max
Unit
Bits
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Impedance
Sampling Capacitance
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise
2
Full-Scale Error
3, 4
Full-Scale Error Drift
Full-Scale Error
Ext. REF = 2.5 V
Full-Scale Error Drift
Ext. REF = 2.5 V
Bipolar Zero Error
3
Bipolar Ranges
Bipolar Zero Error Drift
Bipolar Ranges
Unipolar Zero Error
3
Unipolar Ranges
Unipolar Zero Error Drift
Unipolar Ranges
Recovery to Rated Accuracy
After Power-Down
5
2.2
µF
to CAP
Power Supply Sensitivity
V
ANA
= V
DIG
= V
D
= 5 V
±
5%
AC ACCURACY
Spurious Free Dynamic Range
6
Total Harmonic Distortion
6
Signal-to-(Noise+Distortion)
6
–60 dB Input
Signal-to-Noise
6
Full Power Bandwidth
8
–3 dB Input Bandwidth
SAMPLING DYNAMICS
Aperture Delay
Transient Response, Full-Scale Step
Overvoltage Recovery
9
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
Ext. REF = 2.5 V
Min
16
A Grade
Typ
Max
Min
16
B Grade
Typ
40
10
100
±
3
+3
1.0
±
7
±
0.5
±
0.5
±
2
±
10
±
2
±
10
±
2
1
±
8
90
–90
83
27
83
700
1.5
40
2
150
2.48
2.5
1
2.5
2.52
±
10 V, 0 V to 5 V, . . . (See Table II)
See Table II
40
10
100
±
2.0
+1.75
1.0
±
7
±
0.25
±
0.25
±
2
±
10
±
2
±
10
±
2
1
±
8
96
–96
85
28
85
700
1.5
40
2
150
2.48
2.5
1
2.5
2.52
2.48
83
83
90
100
40
10
pF
µs
kHz
LSB
1
LSB
Bits
LSB
%
ppm/°C
%
ppm/°C
±
15
mV
ppm/°C
±
10
mV
ppm/°C
–2
15
–1
16
±
3
±
2
15
1.0
±
7
±
0.5
±
0.5
±
2
±
2
±
2
1
±
8
ms
LSB
dB
7
dB
dB
dB
dB
kHz
MHz
ns
µs
ns
V
µA
V
µA
–90
27
700
1.5
40
2
150
2.5
1
2.5
2.52
2.3
2.7
100
2.3
2.7
100
2.3
2.7
100
NOTES
1
LSB means Least Significant Bit. With a
±
10 V input, one LSB is 305
µV.
2
Typical rms noise at worst case transitions and temperatures.
3
Measured with fixed resistors as shown in Figures 11, 12 and 13. Adjustable to zero. Tested at room temperature.
4
Full-Scale Error is expressed as the % difference between the actual full-scale code transition voltage and the ideal full scale transition voltage, and includes the effect of offset
error. For bipolar input ranges, the Full-Scale Error is the worst case of either the –Full Scale or +Full Scale code transition voltage errors. For unipolar input ranges, Full-Scale
Error is with respect to the +Full-Scale code transition voltage.
5
External 2.5 V reference connected to REF.
6
f
IN
= 20 kHz, 0.5 dB down unless otherwise noted.
7
All specifications in dB are referred to a full scale
±
10 V input.
8
Full-Power Bandwidth is defined as full-scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60 dB, or 10 bits of accuracy.
9
Recovers to specified performance after a 2
×
F
S
input overvoltage.
Specifications subject to change without notice.
–2–
REV. D
AD977/AD977A
AD977A–SPECIFICATIONS
(–40 C to +85 C, F = 200 kHz, V
S
DIG
= V
ANA
= 5 V, unless otherwise noted)
Max
Min
16
C Grade
Typ Max
Unit
Bits
Parameter
RESOLUTION
ANALOG INPUT
Voltage Range
Impedance
Sampling Capacitance
THROUGHPUT SPEED
Complete Cycle
Throughput Rate
DC ACCURACY
Integral Linearity Error
Differential Linearity Error
No Missing Codes
Transition Noise
2
Full-Scale Error
3, 4
Full-Scale Error Drift
Full-Scale Error
Ext. REF = 2.5 V
Full-Scale Error Drift
Ext. REF = 2.5 V
Bipolar Zero Error
3
Bipolar Ranges
Bipolar Zero Error Drift
Bipolar Ranges
Unipolar Zero Error
3
Unipolar Ranges
Unipolar Zero Error Drift
Unipolar Ranges
Recovery to Rated Accuracy
After Power-Down
5
2.2
µF
to CAP
Power Supply Sensitivity
V
ANA
= V
DIG
= V
D
= 5 V
±
5%
AC ACCURACY
Spurious Free Dynamic Range
6
Total Harmonic Distortion
6
Signal-to-(Noise+Distortion)
6
–60 dB Input
Signal-to-Noise
6
Full Power Bandwidth
8
–3 dB Input Bandwidth
SAMPLING DYNAMICS
Aperture Delay
Transient Response, Full-Scale Step
Overvoltage Recovery
9
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
External Reference Voltage Range
for Specified Linearity
External Reference Current Drain
Ext. REF = 2.5 V
Min
16
A Grade
Typ
Max
Min
16
B Grade
Typ
40
5
200
±
3
+3
1.0
±
7
±
0.5
±
0.5
±
2
±
10
±
2
±
10
±
2
1
±
8
90
–90
83
27
83
1
2.7
40
1
150
2.48
2.5
1
2.5
2.52
±
10 V, 0 V to 5 V, . . . (See Table II)
See Table II
40
5
200
±
2.0
+1.75
1.0
±
7
±
0.25
±
0.25
±
2
±
10
±
2
±
10
±
2
1
±
8
96
–96
85
28
85
1
2.7
40
1
150
2.48
2.5
1
2.5
2.52
2.48
83
83
90
200
40
5
pF
µs
kHz
LSB
1
LSB
Bits
LSB
%
ppm/°C
%
ppm/°C
±
15
mV
ppm/°C
±
10
mV
ppm/°C
–2
15
–1
16
±
3
±
2
15
1.0
±
7
±
0.5
±
0.5
±
2
±
2
±
2
1
±
8
ms
LSB
dB
7
dB
dB
dB
dB
MHz
MHz
ns
µs
ns
V
µA
V
mA
–90
27
1
2.7
40
1
150
2.5
1
2.5
2.52
2.3
2.7
1.2
2.3
2.7
1.2
2.3
2.7
1.2
NOTES
1
LSB means Least Significant Bit. With a
±
10 V input, one LSB is 305
µV.
2
Typical rms noise at worst case transitions and temperatures.
3
Measured with fixed resistors as shown in Figures 11, 12 and 13. Adjustable to zero. Tested at room temperature.
4
Full-Scale Error is expressed as the % difference between the actual full-scale code transition voltage and the ideal full scale transition voltage, and includes the effect of offset
error. For bipolar input ranges, the Full-Scale Error is the worst case of either the –Full Scale or +Full Scale code transition voltage errors. For unipolar input ranges, Full-Scale
Error is with respect to the +Full-Scale code transition voltage.
5
External 2.5 V reference connected to REF.
6
f
IN
= 20 kHz, 0.5 dB down unless otherwise noted.
7
All specifications in dB are referred to a full scale
±
10 V input.
8
Full-Power Bandwidth is defined as full-scale input frequency at which Signal-to-(Noise+Distortion) degrades to 60 dB, or 10 bits of accuracy.
9
Recovers to specified performance after a 2
×
F
S
input overvoltage.
Specifications subject to change without notice.
REV. D
–3–
AD977/AD977A–SPECIFICATIONS
(Both Specs)
Parameter
DIGITAL INPUTS
Logic Levels
V
IL
V
IH
I
IL
I
IH
DIGITAL OUTPUTS
Data Format
Data Coding
Pipeline Delay
V
OL
V
OH
POWER SUPPLIES
Specified Performance
V
DIG
V
ANA
I
DIG
I
ANA
Power Dissipation
PWRD LOW
PWRD HIGH
TEMPERATURE RANGE
Specified Performance
T
MIN
to T
MAX
Conditions
Min
A, B, C Grades
Typ
Max
Unit
–0.3
2.0
+0.8
V
DIG
+ 0.3
±
10
±
10
V
V
µA
µA
I
SINK
= 1.6 mA
I
SOURCE
= 500
µA
Serial 16-Bits
Binary Two’s Complement or Straight Binary
Conversion Results Only Available after Completed Conversion
0.4
4
V
V
4.75
4.75
5
5
4
11
5.25
5.25
V
V
mA
mA
mW
µW
°C
100
50
–40
+85
Specifications subject to change without notice.
TIMING SPECIFICATIONS
(AD977A: F = 200 kHz, AD977: F = 100 kHz, V
S
S
DIG
= V
ANA
= 5 V, –40 C to +85 C)
AD977
Min Typ Max
50
83
4.0
83
8.0
50
40
7.6
2.0
5
10
350
450
100
20
100
20
30
20
10
15
25
10
7.5
5
0
20
8.0
Unit
ns
ns
µs
ns
ns
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
µs
ns
ns
Symbol
Convert Pulsewidth
R/C,
CS
to
BUSY
Delay
BUSY
LOW Time
BUSY
Delay after End of Conversion
Aperture Delay
Conversion Time
Acquisition Time
Throughput Time
R/C Low to DATACLK Delay
DATACLK Period
DATA Valid Setup Time
DATA Valid Hold Time
EXT. DATACLK Period
EXT. DATACLK HIGH
EXT. DATACLK LOW
R/C,
CS
to EXT. DATACLK Setup Time
R/C to
CS
Setup Time
EXT. DATACLK to SYNC Delay
EXT. DATACLK to DATA Valid Delay
CS
to EXT. DATACLK Rising Edge Delay
Previous DATA Valid after
CS,
R/C Low
BUSY
to EXT. DATACLK Setup Time
Final EXT. DATACLK to
BUSY
Rising Edge
TAG Valid Setup Time
TAG Valid Hold Time
Specifications subject to change without notice.
AD977A
Min Typ Max
50
50
40
3.8
1.0
220
220
50
20
66
20
30
20
10
15
25
10
3.5
5
0
20
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
6
+ t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
14
t
15
t
16
t
17
t
18
t
19
t
20
t
21
t
22
t
23
t
24
4.0
t
12
+ 5
66
66
t
12
+ 5
66
66
1.7
3.5
–4–
REV. D
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