1.8 nV/√Hz, 36 V Precision Amplifiers
ADA4004-1/ADA4004-2/ADA4004-4
FEATURES
Very low voltage noise: 1.8 nV/√Hz
Low input bias current: 90 nA maximum
Offset voltage: 125 µV maximum
High gain: 120 dB
Wide bandwidth: 12 MHz
5
V to
15
V operation
PIN CONFIGURATIONS
OUT
1
5
V+
ADA4004-1
V–
2
+IN
3
05577-001
05577-002
TOP VIEW
(Not to Scale)
4
–IN
APPLICATIONS
Precision instrumentation
Filter blocks
Microphone preamplifiers
Industrial control
Thermocouples and RTDs
Reference buffers
Figure 1. 5-Lead SOT
(RJ-5)
NC
1
–IN
2
+IN
3
8
NC
V+
OUT
NC
ADA4004-1
7
6
5
TOP VIEW
V–
4
(Not to Scale)
NC = NO CONNECT
Figure 2. 8-Lead SOIC
(R-8)
OUT A
1
–IN A
2
+IN A
3
V–
4
8
GENERAL DESCRIPTION
The
ADA4004-1/ADA4004-2/ADA4004-4
are 1.8 nV/√Hz
precision amplifiers featuring 40 μV offset, 0.7 μV/°C drift,
12 MHz bandwidth, and low 1.7 mA per amplifier supply current.
The
ADA4004-1/ADA4004-2/ADA4004-4
are designed on the
high performance
iPolar™
process, enabling improvements such
as reduced noise and power consumption, increased speed and
stability, and smaller footprint size. Novel design techniques enable
the
ADA4004-1/ADA4004-2/ADA4004-4
to achieve 1.8 nV/√Hz
voltage noise density and a low 6 Hz 1/f noise corner frequency
while consuming just 1.7 mA per amplifier. The small package
saves board space, reduces cost, and improves layout flexibility.
Applications for these amplifiers include high precision controls,
PLL filters, high performance precision filters, medical and
analytical instrumentation, precision power supply controls,
ATE, and data acquisition systems. Operation is fully specified
from ±5 V to ±15 V from −40°C to +125°C.
The
ADA4004-1, ADA4004-2,
and
ADA4004-4
are members
of a growing series of low noise op amps offered by Analog
Devices, Inc., (see Table 1).
Table 1. Voltage Noise
Pkg.
Single
Dual
Quad
0.9 nV
AD797
1.1 nV
AD8597
AD8599
1.8 nV
ADA4004-1
ADA4004-2
ADA4004-4
2.8 nV
AD8675
AD8676
3.8 nV
AD8671
AD8672
AD8674
V+
OUT B
05577-003
05577-091
ADA4004-2
TOP VIEW
(Not to Scale)
7
6
5
–IN B
+IN B
Figure 3. 8-Lead MSOP (RM-8) and 8-Lead SOIC (R-8)
OUT A
1
–IN A
2
+IN A
3
V+
4
14
13
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
ADA4004-4
TOP VIEW
(Not to Scale)
12
11
10
9
8
+IN B
5
–IN B
6
OUT B
7
Figure 4. 14-Lead SOIC
(R-14)
14
OUT D
15
OUT A
16
NC
13
NC
–IN A 1
+IN A 2
V+ 3
+IN B 4
OUT C
7
OUT B
6
–IN C
8
–IN B
5
12 –IN D
ADA4004-4
TOP VIEW
(Not to Scale)
11 +IN D
10 V–
9
+IN C
05577-005
NOTES
1. NC = NO CONNECT.
2.
IT IS RECOMMENDED THAT THE EXPOSED PAD
BE CONNECTED TO V–.
Figure 5. 16-Lead LFCSP
(CP-16-23)
Rev. H
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ADA4004-1/ADA4004-2/ADA4004-4
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Data Sheet
Absolute Maximum Ratings ............................................................5
Thermal Resistance .......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 14
REVISION HISTORY
7/15—Rev. G to Rev. H
Changed CP-16-4 to CP-16-23 and Changed LFCSP_VQ to
LFCSP_WQ .................................................................... Throughout
Changes to Figure 5 .......................................................................... 1
Changed Differential Input Voltage Parameter, Table 4 .............. 5
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 15
4/11—Rev. F to Rev. G
Changes to Figure 1 .......................................................................... 1
Updated Outline Dimensions ....................................................... 12
6/10—Rev. E to Rev. F
Added Differential Input Current to Table 4 ................................ 5
Changes to Figure 14 and Figure 17 ............................................... 7
10/09—Rev. D to Rev. E
Changes to Product Title, General Description Section, and
Figure 5 .............................................................................................. 1
Updated Outline Dimensions (RM-8) ......................................... 13
Changes to Ordering Guide .......................................................... 14
6/09—Rev. C to Rev. D
Changes to Figure 5 .......................................................................... 1
10/08—Rev. B to Rev. C
Added ADA4004-1 and ADA4004-2 ............................... Universal
Added 5-Lead SOT, 8-Lead SOIC, and 8-Lead MSOP ....... Universal
Changes to Features Section .................................................................... 1
Added Figure 1 to Figure 3; Renumbered Sequentially...................... 1
Changes to General Description Section .............................................. 1
Added Table 1; Renumbered Sequentially ............................................ 1
Change to Output Voltage Low Parameter, Table 2............................. 3
Changes to Supply Current per Amplifier Parameter, Table 2 .......... 3
Added Phase Margin Parameter, Table 2............................................... 3
Change to Output Voltage Low Parameter, Table 3............................. 3
Changes to Supply Current per Amplifier Parameter, Table 3 .......... 4
Added Phase Margin Parameter, Table 3............................................... 4
Changes to Table 4 ..................................................................................... 5
Changes to Thermal Resistance Section................................................ 5
Changes to Table 5 ..................................................................................... 5
Update Outline Dimensions .................................................................. 12
Changes to Ordering Guide ................................................................... 13
11/07—Rev. A to Rev. B
Changed V
S
to V
SY
.............................................................. Universal
Changes to General Description .....................................................1
Changes to Supply Current per Amplifier .....................................3
Changes to Open-Loop Gain ...........................................................4
Changes to Supply Current per Amplifier .....................................4
Changes to Figure 10, Figure 11, Figure 13, and Figure 14 ..........7
Changes to Figure 26.........................................................................9
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
7/06—Rev. 0 to Rev. A
Changes to Table 4 .............................................................................5
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 12
1/06—Revision 0: Initial Version
Rev. H | Page 2 of 16
Data Sheet
SPECIFICATIONS
V
SY
=
±5
V, V
CM
= 0 V, T
A
= 25°C, unless otherwise specified.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Open-Loop Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Current Noise Density
Symbol
V
OS
Conditions
ADA4004-1/ADA4004-2/ADA4004-4
Min
Typ
40
Max
140
300
85
165
85
100
+3.5
Unit
μV
μV
nA
nA
nA
nA
V
dB
dB
V/mV
V/mV
μV/°C
V
V
V
V
mA
mA
mA
dB
dB
mA
mA
V/μs
MHz
Degrees
μV p-p
nV/√Hz
pA/√Hz
pA/√Hz
−40°C
≤
T
A
≤
+125°C
I
B
−40°C
≤
T
A
≤
+125°C
I
OS
−40°C
≤
T
A
≤
+125°C
IVR
CMRR
A
VO
∆V
OS
/∆T
V
OH
V
OL
I
SC
I
O
PSRR
I
SY
−40°C
≤
T
A
≤
+125°C
SR
GBP
Φ
M
e
n p-p
e
n
i
n
i
n
R
L
= 2 kΩ to ground
2.7
12
48
0.1
1.8
3.5
1.2
−40°C
≤
T
A
≤
+125°C
V
OUT
= ±3.6 V
V
SY
=
±5
V to
±15
V
−40°C
≤
T
A
≤
+125°C
110
110
V
CM
= −3.0 V to +3.0 V
−40°C
≤
T
A
≤
+125°C
R
L
= 2 kΩ, V
OUT
= −2.5 V to +2.5 V
−40°C
≤
T
A
≤
+125°C
−40°C
≤
T
A
≤
+125°C
R
L
= 2 kΩ to ground
−40°C
≤
T
A
≤
+125°C
R
L
= 2 kΩ to ground
−40°C
≤
T
A
≤
+125°C
−3.5
105
95
250
170
111
110
400
0.7
3.7
3.4
3.9
3.6
−3.6
−3.6
25
±10
118
40
40
1
−3.55
−3.4
2.0
2.2
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 10 Hz
f = 200 Hz
Rev. H | Page 3 of 16
ADA4004-1/ADA4004-2/ADA4004-4
V
SY
=
±15
V, V
CM
= 0 V, T
A
= 25°C, unless otherwise specified.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Open-Loop Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Current Noise Density
Symbol
V
OS
−40°C
≤
T
A
≤
+125°C
I
B
−40°C
≤
T
A
≤
+125°C
I
OS
−40°C
≤
T
A
≤
+125°C
IVR
CMRR
A
VO
∆V
OS
/∆T
V
OH
V
OL
I
SC
I
O
PSRR
I
SY
−40°C
≤
T
A
≤
+125°C
SR
GBP
Φ
M
e
n p-p
e
n
i
n
i
n
R
L
= 2 kΩ to ground
2.7
12
48
0.15
1.8
3.5
1.2
V
CM
= −12.5 V to +12.5 V
−40°C
≤
T
A
≤
+125°C
R
L
= 2 kΩ, V
OUT
= −12.0 V to +12.0 V
−40°C
≤
T
A
≤
+125°C
−40°C
≤
T
A
≤
+125°C
R
L
= 2 kΩ to ground
−40°C
≤
T
A
≤
+125°C
R
L
= 2 kΩ to ground
−40°C
≤
T
A
≤
+125°C
V
OUT
= ±13.6 V
V
SY
=
±5
V to
±15
V
−40°C
≤
T
A
≤
+125°C
110
110
−12.5
110
100
500
250
113
104
1200
500
0.7
13.6
13.3
−13.3
−13.25
25
±10
118
40
Conditions
Min
Typ
40
Data Sheet
Max
125
270
90
165
60
100
+12.5
Unit
μV
μV
nA
nA
nA
nA
V
dB
dB
V/mV
V/mV
μV/°C
V
V
V
V
mA
mA
dB
dB
mA
mA
V/μs
MHz
Degrees
μV p-p
nV/√Hz
pA/√Hz
pA/√Hz
1
13.4
13.1
−13.2
−13.15
2.2
2.4
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 10 Hz
f = 200 Hz
Rev. H | Page 4 of 16
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Differential Input Current
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering 60 sec)
Rating
±18 V or +36 V
V− < V
IN
< V+
±600 mV
±5 mA
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
ADA4004-1/ADA4004-2/ADA4004-4
THERMAL RESISTANCE
θ
JA
is specified with the device soldered on a circuit board with
its exposed paddle soldered to a pad (if applicable) on a 4-layer
JEDEC standard printed circuit board with zero airflow.
Table 5.
Package Type
5-Lead SOT (RJ-5)
8-Lead SOIC (R-8),
ADA4004-1
8-Lead SOIC (R-8),
ADA4004-2
8-Lead MSOP (RM-8)
14-Lead SOIC_N (R-14)
16-Lead LFCSP_VQ (CP-16-4)
θ
JA
230
177
155
186
115
44
θ
JC
92
53
45
52
36
31.5
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Rev. H | Page 5 of 16
