Data Sheet
FEATURES
Single-supply operation: 3.0 V to 30 V
Wide input voltage range
Rail-to-rail output swing
Low supply current: 200 μA/amplifier
Wide bandwidth: 1.2 MHz
Slew rate: 0.46 V/μs
Low offset voltage: 250 μV maximum
No phase reversal
Overvoltage protection (OVP)
25 V above/below supply rails at ±5 V
12 V above/below supply rails at ±15 V
Precision Micropower, OVP, RRIO
Operational Amplifier
ADA4091-2/ADA4091-4
PIN CONFIGURATIONS
OUTA
1
–INA
2
+INA
3
–V
4
8
+V
OUTB
07671-001
07671-101
ADA4091-2
TOP VIEW
(Not to Scale)
7
6
5
–INB
+INB
Figure 1. 8-Lead, Narrow-Body SOIC (R-8)
OUTA 1
–INA 2
+INA 3
–V 4
8 +V
ADA4091-2
TOP VIEW
(Not to Scale)
7 OUTB
6 –INB
5 +INB
07571-102
APPLICATIONS
Industrial process control
Battery-powered instrumentation
Power supply control and protection
Telecommunications
Remote sensors
Low voltage strain gage amplifiers
DAC output amplifiers
NOTES
1. IT IS RECOMMENDED TO CONNECT THE
EXPOSED PAD TO V–.
Figure 2. 8-Lead LFCSP (CP-8-21)
OUTA
1
–INA
+INA
2
3
14
13
OUTD
–IND
+IND
–V
+INC
–INC
OUTC
ADA4091-4
TOP VIEW
(Not to Scale)
12
11
10
9
8
+V
4
+INB
5
–INB
OUTB
6
7
GENERAL DESCRIPTION
The
ADA4091-2
dual and
ADA4091-4
quad are micropower,
single-supply, 1.2 MHz bandwidth amplifiers featuring rail-to-
rail inputs and outputs. They are guaranteed to operate from a
+3.0 V to +30 V single supply as well as from ±1.5 V to ±15 V
dual supplies.
The
ADA4091-2/ADA4091-4
features a unique input stage that
allows the input voltage to exceed either supply safely without any
phase reversal or latch-up; this is called overvoltage protection
(OVP).
Applications for these amplifiers include portable telecom-
munications equipment, power supply control and protection,
and interface for transducers with wide output ranges. Sensors
requiring a rail-to-rail input amplifier include Hall effect, piezo-
electric, and resistive transducers.
The ability to swing rail-to-rail at both the input and output enables
designers, for example, to build multistage filters in single-supply
systems and to maintain high signal-to-noise ratios (SNR).
The
ADA4091-2/ADA4091-4
is specified over the extended indus-
trial temperature range of −40°C to +125°C. The
ADA4091-2/
ADA4091-4
is part of the growing selection of 36 V, low power
operational amplifiers from Analog Devices, Inc., (see Table 1).
Figure 3. 14-Lead TSSOP (RU-14)
14 OUTD
15 OUTA
16 NC
13 NC
12 –IND
11 +IND
10 V–
9
+INC
–INA 1
+INA 2
V+ 3
+INB 4
ADA4091-4
TOP
VIEW
NOTES
1. NC = NO CONNECT.
2. IT IS RECOMMENDED TO CONNECT THE
EXPOSED PAD TO V–.
OUTC 7
OUTB 6
–INC 8
–INB 5
Figure 4. 16-Lead LFCSP (CP-16-17)
The
ADA4091-2
is available in 8-lead, plastic SOIC and 8-lead
LFCSP packages. The
ADA4091-4
is available in 14–lead TSSOP
and 16-lead LFCSP surface-mount packages.
Table 1. Low Power, 36 V Operational Amplifiers
Family
Single
Dual
Quad
Rail-to-Rail I/O
ADA4091-2
ADA4091-4
PJFET
AD8682
AD8684
Low Noise
OP1177
OP2177
OP4177
Rev. H
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Trademarks and registered trademarks are the property of their respective owners.
07671-103
ADA4091-2/ADA4091-4
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications ............................................................... 3
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance ...................................................................... 6
Data Sheet
ESD Caution...................................................................................6
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 14
Input Stage ................................................................................... 14
Output Stage................................................................................ 14
Input Overvoltage Protection ................................................... 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 18
REVISION HISTORY
5/2016—Rev. G. to Rev. H
Changed CP-8-9 to CP-8-21 ........................................ Throughout
Changes to Figure 2 .......................................................................... 1
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 18
10/2013—Rev. F. to Rev. G
Changed Open-Loop Impedance to Closed-Loop Impedance
(Throughout) .................................................................................... 3
Updated Outline Dimensions ....................................................... 17
10/2010—Rev. E. to Rev. F
Changes to Features Section and General Description Section . 1
Changes to Outline Dimensions................................................... 17
5/2010—Rev. D. to Rev. E
Changes to Data Sheet Title ............................................................ 1
Changes to Table 2, Input Characteristics, Offset Voltage .......... 3
Changes to Table 3, Input Characteristics, Offset Voltage .......... 4
Changes to Table 4, Input Characteristics, Offset Voltage .......... 5
4/2010—Rev. C to Rev. D
Changes to Table 2, Added LFCSP to Input Characteristics ...... 3
Changes to Table 3, Added LFCSP to Input Characteristics ...... 4
Changes to Table 4, Added LFCSP to Input Characteristics ...... 5
10/2009—Rev. B to Rev. C
Added 8-Lead LFCSP and 16-Lead LFCSP ..................... Universal
Change to Features Section ............................................................. 1
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 18
7/2009—Rev. A to Rev. B
Added New Part ADA4091-4 ........................................... Universal
Changes to Features Section, General Description Section, and
Figure 4 ...............................................................................................1
Added Figure 2, Renumbered Sequentially ...................................1
Changes to Table 1.............................................................................1
Changes to Table 2.............................................................................3
Changes to Table 3.............................................................................4
Changes to Table 4.............................................................................5
Changes to Table 5.............................................................................6
Changes to Table 6.............................................................................6
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 16
7/2009—Rev. 0 to Rev. A
Changes to Data Sheet Title .............................................................1
Changes to Features ..........................................................................1
Changes to Table 2.............................................................................3
Changes to Table 3.............................................................................4
Changes to Table 4.............................................................................5
Added Input Current Parameter, Table 5 .......................................6
Added New Figure 12 and Figure 13, Renumbered
Sequentially ........................................................................................8
Added New Figure 24 and Figure 25 ........................................... 10
Added New Figure 36 and Figure 37 ........................................... 12
Added New Figure 43 .................................................................... 13
Changes to Input Overvoltage Protection Section..................... 15
Changes to Ordering Guide .......................................................... 16
10/2008—Revision 0: Initial Version
Rev. H | Page 2 of 20
Data Sheet
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
V
SY
= ±1.5 V, V
CM
= 0.0 V, T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
V
OS
ADA4091-4
LFCSP package
−40°C ≤ T
A
≤ +125°C
Offset Voltage Drift
Input Bias Current
∆V
OS
/∆T
I
B
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +125°C
Input Offset Current
I
OS
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
CMRR
A
VO
V
CM
= −1.35 V to +1.35 V
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ, V
O
= −1.2 V to +1.2 V
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ, V
O
= −1.2 V to +1.2 V
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ to GND
−40°C to +125°C
R
L
= 100 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ to GND
−40°C ≤ T
A
≤ +125°C
Source/sink
f = 1 MHz, A
V
= 1
V
SY
= 2.7 V to 36 V
−40°C ≤ T
A
≤ +125°C
I
O
= 0 mA
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ, C
L
= 30 pF
To 0.01%
Test Conditions/Comments
Min
−250
−400
−600
−55
−55
−275
−3
−5
−75
−1.5
84
78
106
101
92
85
1.490
1.490
1.475
1.455
ADA4091-2/ADA4091-4
Typ
−40
−40
2.5
−44
Max
+250
+400
+600
Unit
µV
µV
µV
µV/°C
nA
nA
nA
nA
nA
nA
V
dB
dB
dB
dB
dB
dB
V
V
V
V
V
V
V
V
mA
Ω
dB
dB
µA
µA
V/µs
µs
MHz
Degrees
µV p-p
nV/√Hz
0.5
+55
+275
+3
+5
+75
+1.5
100
113
94
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
1.495
1.485
−1.499
−1.495
±31
102
−1.495
−1.495
−1.490
−1.490
Output Voltage Low
V
OL
Short-Circuit Limit
Closed-Loop Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
I
SC
Z
OUT
PSRR
I
SY
108
100
126
165
200
300
SR
t
S
GBP
Φ
M
e
n
p-p
e
n
0.46
22
1.22
69
0.8
24
0.1 Hz to 10 Hz
f = 1 kHz
Rev. H | Page 3 of 20
ADA4091-2/ADA4091-4
V
SY
= ±5.0 V, V
CM
= 0.0 V, T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
V
OS
ADA4091-4
LFCSP package
−40°C ≤ T
A
≤ +125°C
Offset Voltage Drift
Input Bias Current
∆V
OS
/∆T
I
B
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +125°C
Input Offset Current
I
OS
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
CMRR
A
VO
V
CM
= −4.85 V to +4.85 V
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ, V
O
= ±4.7 V
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ, V
O
= ±4.7 V
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ to GND
−40°C ≤ T
A
≤ +125°C
Source/sink
f = 1 MHz, A
V
= 1
V
SY
= 2.7 V to 36 V
−40°C ≤ T
A
≤ +125°C
I
O
= 0 mA
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ, C
L
= 30 pF
To 0.01%
Test Conditions/Comments
Min
−250
−400
−600
−60
−80
−350
−3
−7
−100
−5
95
88
113
106
98
90
4.980
4.980
4.950
4.900
Typ
−45
−40
2.5
−50
Data Sheet
Max
+250
+400
+600
Unit
µV
µV
µV
µV/°C
nA
nA
nA
nA
nA
nA
V
dB
dB
dB
dB
dB
dB
V
V
V
V
V
V
V
V
mA
Ω
dB
dB
µA
µA
V/µs
µs
MHz
Degrees
µV p-p
nV/√Hz
0.5
+80
+350
+3
+7
+100
+5
113
117
100
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
4.990
4.960
−4.998
−4.990
±20
77
−4.990
−4.980
−4.980
−4.975
Output Voltage Low
V
OL
Short-Circuit Limit
Closed-Loop Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
I
SC
Z
OUT
PSRR
I
SY
108
100
126
180
225
300
SR
t
S
GBP
Φ
M
e
n
p-p
e
n
0.46
22
1.22
70
0.8
24
0.1 Hz to 10 Hz
f = 1 kHz
Rev. H | Page 4 of 20
Data Sheet
V
SY
= ±15.0 V, V
CM
= 0.0 V, V
O
= 0.0 V, T
A
= 25°C, unless otherwise noted.
Table 4.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
V
OS
ADA4091-4
LFCSP package
−40°C ≤ T
A
≤ +125°C
Offset Voltage Drift
Input Bias Current
∆V
OS
/∆T
I
B
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +125°C
Input Offset Current
I
OS
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
CMRR
A
VO
V
CM
= −14.85 V to +14.85 V
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ, V
O
= ±14.7 V
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ, V
O
= ±14.7 V
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ to GND
−40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ to GND
−40°C ≤ T
A
≤ +125°C
Source/sink
f = 1 MHz, A
V
= 1
V
SY
= 2.7 V to 36 V
−40°C ≤ T
A
≤ +125°C
I
O
= 0 mA
−40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ, C
L
= 30 pF
To 0.01%
Test Conditions/Comments
Min
−250
−400
−600
−60
−80
−510
−3
−10
−140
−15
104
95
116
108
102
93
14.975
14.950
14.900
14.800
ADA4091-2/ADA4091-4
Typ
−35
−40
3.0
−50
Max
+250
+400
+600
Unit
µV
µV
µV
µV/°C
nA
nA
nA
nA
nA
nA
V
dB
dB
dB
dB
dB
dB
V
V
V
V
V
V
V
V
mA
Ω
dB
dB
µA
µA
V/µs
µs
MHz
Degrees
dB
µV p-p
nV/√Hz
0.5
+80
+510
+3
+10
+140
+15
121
119
104
OUTPUT CHARACTERISTICS
Output Voltage High
V
OH
14.980
14.920
−14.996
−14.975
±20
71
−14.990
−14.985
−14.950
−14.940
Output Voltage Low
V
OL
Short-Circuit Limit
Closed-Loop Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
Phase Margin
Channel Separation
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
I
SC
Z
OUT
PSRR
I
SY
108
100
126
200
250
350
SR
t
S
GBP
Φ
M
CS
e
n
p-p
e
n
f = 1 kHz
0.1 Hz to 10 Hz
f = 1 kHz
0.46
22
1.27
72
100
0.8
25
Rev. H | Page 5 of 20