Data Sheet
FEATURES
Low Power, Three Electrode
Electrocardiogram (ECG) Analog Front End
ADAS1000-3/ADAS1000-4
The
ADAS1000-4
is a full-featured, 3-channel ECG including
respiration and pace detection, while the
ADAS1000-3
offers
only ECG channels with no respiration or pace features.
The
ADAS1000-3/ADAS1000-4
are designed to simplify
the task of acquiring and ensuring quality ECG signals.
They provide a low power, small data acquisition system for
biopotential applications. Auxiliary features that aid in better
quality ECG signal acquisition include: multichannel averaged
driven lead, selectable reference drive, fast overload recovery,
flexible respiration circuitry returning magnitude and phase
information, internal pace detection algorithm operating
on three leads, and the option of ac or dc lead-off detection.
Several digital output options ensure flexibility when monitor-
ing and analyzing signals. Value-added cardiac post processing
is executed externally on a DSP, microprocessor, or FPGA.
Because ECG systems span different applications, the
ADAS1000-3/ADAS1000-4
feature a power/noise scaling
architecture where the noise can be reduced at the expense
of increasing power consumption. Signal acquisition channels
may be shut down to save power. Data rates can be reduced to
save power.
To ease manufacturing tests and development as well as offer
holistic power-up testing, the
ADAS1000-3/ADAS1000-4
offer a suite of features, such as dc and ac test excitation via
the calibration DAC and CRC redundancy testing in addition
to readback of all relevant register address space.
The input structure is a differential amplifier input thereby
allowing users a variety of configuration options to best suit
their application.
The
ADAS1000-3/ADAS1000-4
are available in two package
options: either a 56-lead LFCSP or a 64-lead LQFP package;
they are specified over −40°C to +85°C temperature range.
Biopotential signals in; digitized signals out
3 acquisition (ECG) channels and one driven lead
Can be ganged for 8 electrode + RLD using master
ADAS1000
or
ADAS1000-1
AC and DC lead-off detection
Internal pace detection algorithm on 3 leads
Support for user’s own pace
Thoracic impedance measurement (internal/external path)
Selectable reference lead
Scalable noise vs. power control, power-down modes
Low power operation from
11 mW (1 lead), 15 mW (3 leads)
Lead or electrode data available
Supports AAMI EC11:1991/(R)2001/(R)2007, AAMI EC38
R2007, EC13:2002/(R)2007, IEC60601-1 ed. 3.0 b:2005,
IEC60601-2-25 ed. 2.0 :2011, IEC60601-2-27 ed. 2.0
b:2005, IEC60601-2-51 ed. 1.0 b: 2005
Fast overload recovery
Low or high speed data output rates
Serial interface SPI-/QSPI™-/DSP-compatible
56-lead LFCSP package (9 mm × 9 mm)
64-lead LQFP package (10 mm × 10 mm body size)
APPLICATIONS
ECG: monitor and diagnostic
Bedside patient monitoring, portable telemetry, Holter,
AED, cardiac defibrillators, ambulatory monitors, pace
maker programmer, patient transport, stress testing
GENERAL DESCRIPTION
The
ADAS1000-3/ADAS1000-4
measure electro cardiac (ECG)
signals, thoracic impedance, pacing artifacts, and lead-on/off
status and output this information in the form of a data frame
supplying either lead/vector or electrode data at programmable
data rates. Its low power and small size make it suitable for
portable, battery-powered applications. The high performance
also makes it suitable for higher end diagnostic machines.
Rev. B
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ADAS1000-3/ADAS1000-4
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Noise Performance ..................................................................... 10
Timing Characteristics .............................................................. 11
Absolute Maximum Ratings .......................................................... 14
Thermal Resistance .................................................................... 14
ESD Caution ................................................................................ 14
Pin Configurations and Function Descriptions ......................... 15
Typical Performance Characteristics ........................................... 18
Applications Information .............................................................. 25
Overview...................................................................................... 25
ECG Inputs—Electrodes/Leads ................................................ 27
ECG Channel .............................................................................. 28
Electrode/Lead Formation and Input Stage Configuration .. 29
Defibrillator Protection ............................................................. 33
ESIS Filtering............................................................................... 33
ECG Path Input Multiplexing ................................................... 33
Common-Mode Selection and Averaging .............................. 34
Wilson Central Terminal (WCT) ............................................. 35
Right Leg Drive/Reference Drive ............................................. 35
Calibration DAC ......................................................................... 36
Gain Calibration ......................................................................... 36
Lead-Off Detection .................................................................... 36
Shield Driver ............................................................................... 37
Respiration (ADAS1000-4 Model Only) ................................. 37
Data Sheet
Evaluating Respiration Performance ....................................... 41
Pacing Artifact Detection Function (ADAS1000-4 Only).... 41
Biventricular Pacers ................................................................... 45
Pace Detection Measurements ................................................. 45
Evaluating Pace Detection Performance ................................. 45
Pace Width .................................................................................. 45
Pace Latency ................................................................................ 45
Pace Detection via Secondary Serial Interface ....................... 45
Filtering ....................................................................................... 46
Voltage Reference ....................................................................... 47
Gang Mode Operation ............................................................... 47
Interfacing in Gang Mode ......................................................... 50
Serial Interfaces............................................................................... 51
Standard Serial Interface ........................................................... 51
Secondary Serial Interface......................................................... 55
RESET .......................................................................................... 55
PD Function ................................................................................ 55
SPI Output Frame Structure (ECG and Status Data) ................ 56
SPI Register Definitions and Memory Map ................................ 57
Control Registers Details ............................................................... 58
Interface Examples ..................................................................... 74
Software Flowchart .................................................................... 77
Power Supply, Grounding, and Decoupling Strategy ............ 78
AVDD .......................................................................................... 78
ADCVDD and DVDD Supplies ............................................... 78
Unused Pins/Paths ..................................................................... 78
Layout Recommendations ........................................................ 78
Outline Dimensions ....................................................................... 79
Ordering Guide .......................................................................... 80
Rev. B | Page 2 of 80
Data Sheet
REVISION HISTORY
1/15—Rev. A to Rev. B
Changed Frequency Range from 2.031 kHz (Typ) to 2.039 kHz
(Typ); Table 2 ..................................................................................... 7
Changes to Endnote 3; Table 3 and Changes to Table 4 .............10
Changes to Figure 16 ......................................................................18
Changes to Figure 39 and Figure 40 .............................................22
Changes to ECG Channel Section ................................................28
Changes to Digital Lead Mode and Calculation Section and
Electrode Mode: Common Electrode A and Common
Electrode B Configuration Section; Added Figure 55;
Renumbered Sequentially ..............................................................29
Deleted Table 11; Renumbered Sequentially ...............................29
Added Figure 56 and Figure 57 .....................................................30
Added Figure 58 and Figure 59 .....................................................31
Added Figure 60 ..............................................................................32
Changes to Figure 61, Figure 62, and Figure 63..........................33
Changes to Lead-Off Detection Section ......................................36
Added Figure 66 and Changes to Respiration (ADAS1000-4
Model Only) Section .......................................................................37
Changes to External Respiration Path Section ............................39
Changes to Respiration Carrier Frequency Section; Added
Table 13 and Table 14 ......................................................................40
Changes to Pacing Artifact Detection Function (ADAS1000-4
Only) Section ...................................................................................41
Changes to Table 15 ........................................................................42
Changes to Detection Algorithm Overview Section ..................43
Changes to Pace Edge Threshold, Pace Level Threshold, Pace
Amplitude Threshold, Pace Validation Filters, and Pace Width
Filter Sections ..................................................................................44
Changes to Evaluating Pace Detection Performance Section and
Added Pace Width Section ............................................................45
Changes to Voltage Reference Section .........................................57
Changes to Data Ready (DRDY) Section .....................................53
Changes to Secondary Serial Interface Section and Table 25 ....55
Changes to Bit 3, Table 28 ..............................................................58
Changes to Table 43 ........................................................................68
Changes to Table 45 ........................................................................69
Changes to Table 51 and Table 52 .................................................72
Changes to Example 1: Initialize the Device for ECG Capture
and Start Streaming Data Section .................................................74
E
A
ADAS1000-3/ADAS1000-4
1/13—Rev. 0 to Rev. A
Changes to Endnote 2, Table 1 ........................................................ 3
Changes to Excitation Current Test Conditions/Comments ...... 5
Added Table 3 .................................................................................... 9
Changes to Figure 36, Figure 37, and Figure 39 ......................... 21
Changes to Respiration (ADAS1000-4 Model Only) Section
and Figure 63 ................................................................................... 34
Changes to Figure 64 ...................................................................... 35
Changes to Figure 65 ...................................................................... 36
Added Evaluating Pace Detection Performance Section ........... 40
Changes to Clocks Section ............................................................. 49
Changes to RESPAMP Bits Function Description, Table 29 ..... 55
11/12—Revision 0: Initial Version
Rev. B | Page 3 of 80
ADAS1000-3/ADAS1000-4
FUNCTIONAL BLOCK DIAGRAM
REFIN REFOUT
CAL_DAC_IO
RLD_SJ
RLD_OUT CM_IN
CM_OUT/WCT
SHIELD
AVDD
IOVDD
DRIVEN
LEAD
AMP
–
Data Sheet
VREF
CALIBRATION
DAC
RESPIRATION
DAC
SHIELD
DRIVE
AMP
+
VCM_REF
(1.3V)
COMMON-
MODE AMP
ADCVDD, DVDD
1.8V
REGULATORS
ADCVDD
DVDD
AC
LEAD-OFF
DAC
10kΩ
BUFFER
AC
LEAD-OFF
DETECTION
MUXES
3× ECG PATH
ELECTRODES
×3
AMP
PACE
DETECTION
CS
SCLK
ADC
FILTERS,
CONTROL,
AND
INTERFACE
LOGIC
SDI
SDO
DRDY
GPIO0/MCS
GPIO1/MSCLK
GPIO2/MSDO
GPIO3
EXT_RESP_LA
EXT_RESP_LL
EXT_RESP_RA
AMP
ADC
CLOCK GEN/OSC/
EXTERNAL CLK
SOURCE
ADAS1000-4
RESPIRATION PATH
CLK_IO
10997-001
XTAL1
XTAL2
Figure 1.
ADAS1000-4
3-Channel Full Featured Model
Table 1. Overview of Features Available from
ADAS1000
Generics
Generic
ADAS1000
ADAS1000-1
ADAS1000-2
2
ADAS1000-3
ADAS1000-4
1
2
ECG
5 ECG channels
5 ECG channels
5 ECG channels
3 ECG channels
3 ECG channels
Operation
Master/slave
Master/slave
Slave
Master/slave
Master/slave
Right Leg Drive
Yes
Yes
Yes
Yes
Respiration
Yes
Pace
Detection
Yes
Shield
Driver
Yes
Yes
Yes
Yes
Master
Interface
1
Yes
Yes
Yes
Yes
Yes
Yes
Package
Option
LFCSP, LQFP
LFCSP
LFCSP, LQFP
LFCSP, LQFP
LFCSP, LQFP
Master interface is provided for users wishing to utilize their own digital pace algorithm; see the Secondary Serial Interface section.
This is a companion device for increased channel count purposes. It has a subset of features and is not intended for standalone use. It may be used in conjunction with
any master device.
Rev. B | Page 4 of 80
Data Sheet
SPECIFICATIONS
ADAS1000-3/ADAS1000-4
AVDD = 3.3 V ± 5%, IOVDD = 1.65 V to 3.6 V, AGND = DGND = 0 V, REFIN tied to REFOUT, externally supplied crystal/clock =
8.192 MHz. Decoupling for reference and supplies as noted in the Power Supply, Grounding, and Decoupling Strategy section. T
A
=
−40°C to +85°C, unless otherwise noted. Typical specifications are mean values at T
A
= 25°C.
For specified performance, internal ADCVDD and DVDD linear regulators have been used. They may be supplied from external
regulators. ADCVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5%.
Front-end gain settings: GAIN 0 = ×1.4, GAIN 1 = ×2.1, GAIN 2 = ×2.8, GAIN 3 = ×4.2.
Table 2.
Parameter
ECG CHANNEL
Electrode Input Range
0.3
0.63
0.8
0.97
−40
−200
Input Offset
−7
−7
−15
−22
±2
1||10
105
110
80
19
18
16
Integral Nonlinearity Error
Differential Nonlinearity Error
Gain
2
GAIN 0 (×1.4)
30
5
1.3
1.3
1.3
1.3
±1
2.3
1.97
1.8
1.63
+40
+200
V
V
V
V
nA
nA
mV
mV
mV
mV
μV/°C
GΩ||pF
dB
dB
Bits
Bits
Bits
ppm
ppm
Min
Typ
Max
Unit
Test Conditions/Comments
These specifications apply to the following pins:
ECG1_LA, ECG2_LL, ECG3_RA, CM_IN (CE mode),
EXT_RESP_xx pins when used in extend switch mode
Independent of supply
GAIN 0 (gain setting ×1.4)
GAIN 1 (gain setting ×2.1)
GAIN 2 (gain setting ×2.8)
GAIN 3 (gain setting ×4.2)
Relates to each electrode input; over operating range;
dc and ac lead-off are disabled
AGND to AVDD
Electrode/vector mode with VCM = VCM_REF
GAIN 3
GAIN 2
GAIN 1
GAIN 0
At 10 Hz
51 kΩ imbalance, 60 Hz with ±300 mV differential dc
offset; per AAMI/IEC standards; with driven leg loop
closed
Between channels
Electrode/vector mode, 2 kHz data rate, 24-bit data-word
Electrode/vector mode, 16 kHz data rate, 24-bit data-
word
Electrode/analog lead mode, 128 kHz data rate, 16-bit
data-word
GAIN 0; all data rates
GAIN 0
Referred to input; (2 × VREF)/gain/(2
N
− 1); Applies
after factory calibration. User calibration adjusts this
number.
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
No factory calibration for this gain setting
At 19-bit level in 2 kHz data rate
At 18-bit level in 16 kHz data rate
At 16-bit level in 128 kHz data rate
Input Bias Current
Input Offset Tempco
1
Input Amplifier Input
Impedance
2
CMRR
2
Crosstalk
1
Resolution
2
GAIN 1 (×2.1)
GAIN 2 (×2.8)
GAIN 3 (×4.2)
4.9
9.81
39.24
3.27
6.54
26.15
2.45
4.9
19.62
1.63
3.27
13.08
µV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
μV/LSB
Rev. B | Page 5 of 80
