Data Sheet
FEATURES
1.5 Ω on resistance
0.3 Ω on-resistance flatness
0.1 Ω on-resistance match between channels
Continuous current per channel
LFCSP: 250 mA
TSSOP: 190 mA
Fully specified at +12 V, ±15 V, and ±5 V
No V
L
supply required
3 V logic-compatible inputs
Rail-to-rail operation
16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP
Qualified for automotive applications
1.5 Ω On Resistance, ±15 V/+12 V/±5 V,
iCMOS,
Quad SPST Switches
ADG1411/ADG1412/ADG1413
FUNCTIONAL BLOCK DIAGRAM
S1
IN1
D1
S2
IN2
D2
IN2
D2
IN1
D1
S2
IN2
D2
S1
IN1
D1
S2
S1
ADG1411
IN3
S3
IN3
D3
S4
ADG1412
S3
IN3
D3
S4
ADG1413
S3
D3
S4
06815-001
IN4
D4
IN4
D4
IN4
D4
APPLICATIONS
Automated test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communications systems
Relay replacement
SWITCHES SHOWN FOR A LOGIC 1 INPUT.
Figure 1.
GENERAL DESCRIPTION
The
ADG1411/ADG1412/ADG1413
are monolithic complemen-
tary metal-oxide semiconductor (CMOS) devices containing
four independently selectable switches designed on an
iCMOS®
process.
iCMOS
(industrial CMOS) is a modular manufacturing
process combining high voltage CMOS and bipolar technologies.
It enables the development of a wide range of high performance
analog ICs capable of 33 V operation in a footprint that no previous
generation of high voltage devices has been able to achieve.
Unlike analog ICs using conventional CMOS processes,
iCMOS
components can tolerate high supply voltages while providing
increased performance, dramatically lower power consumption,
and reduced package size.
The on-resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching signals.
iCMOS
construction ensures ultralow power dissipation,
making the devices ideally suited for portable and battery-
powered instruments.
The
ADG1411/ADG1412/ADG1413
contain four independent
single-pole/single-throw (SPST) switches. The
ADG1411
and
ADG1412
differ only in that the digital control logic is inverted.
The
ADG1411
switches are turned on with Logic 0 on the
appropriate control input, whereas the
ADG1412
switches are
turned on with Logic 1. The
ADG1413
has two switches with
digital control logic similar to that of the
ADG1411;
the logic is
inverted on the other two switches. Each switch conducts equally
well in both directions when on and has an input signal range
that extends to the supplies. In the off condition, signal levels up
to the supplies are blocked.
The
ADG1413
exhibits break-before-make switching action for
use in multiplexer applications. Inherent in the design is low
charge injection, which results in minimum transients when the
digital inputs are switched.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
2.6 Ω maximum on resistance over temperature.
Minimum distortion.
Ultralow power dissipation: <0.03 μW.
16-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP.
Rev. C
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ADG1411/ADG1412/ADG1413
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
+12 V Single Supply ..................................................................... 4
±5 V Dual Supply ......................................................................... 5
Data Sheet
Absolute Maximum Ratings ............................................................6
ESD Caution...................................................................................6
Pin Configurations and Function Descriptions ............................7
Typical Performance Characteristics ..............................................8
Terminology .................................................................................... 12
Test Circuits..................................................................................... 13
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 16
Automotive Products ................................................................. 16
REVISION HISTORY
3/16—Rev. B to Rev. C
Changed CP-16-13 to CP-16-26 .................................. Throughout
Changes to Figure 2, Figure 3, and Table 5 ................................... 7
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 16
3/11—Rev. A to Rev. B
Changes to Features Section............................................................ 1
Changes to Table 5, Added Exposed Pad Notation...................... 3
Updated Outline Dimensions ....................................................... 15
Changes to Ordering Guide .......................................................... 40
Added Automotive Products Section........................................... 40
3/09—Rev. 0 to Rev. A
Changes to Power Requirements, I
DD
, Digital Inputs = 5 V
Parameter, Table 1 .............................................................................3
Changes to Power Requirements, I
DD
, Digital Inputs = 5 V
Parameter Table 2 ..............................................................................4
5/08—Revision 0: Initial Version
Rev. C | Page 2 of 16
Data Sheet
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= 15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
On-Resistance Match
Between Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Drain Off Leakage, I
D
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG1413 Only)
Charge Injection, Q
INJ
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
Insertion Loss
C
S
(Off)
C
D
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
I
DD
I
SS
V
DD
/V
SS
1
ADG1411/ADG1412/ADG1413
25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
dB typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
µA typ
µA max
V min/V max
Test Conditions/Comments
1.5
1.8
0.1
0.18
0.3
0.36
±0.03
±0.55
±0.03
±0.55
±0.15
±2
2.3
2.6
V
S
= ±10 V, I
S
= −10 mA; see Figure 23
V
DD
= +13.5 V, V
SS
= −13.5 V
V
S
= ±10 V , I
S
= −10 mA
0.19
0.4
0.21
0.45
V
S
= ±10 V, I
S
= −10 mA
V
DD
= +16.5 V, V
SS
= −16.5 V
V
S
= ±10 V, V
D
=
∓10
V; see Figure 24
V
S
= V
D
= ±10 V; see Figure 25
V
S
= ±10 V, V
D
=
∓10
V; see Figure 24
±2
±2
±4
±12.5
±12.5
±30
2.0
0.8
0.005
±0.1
3.5
100
150
90
120
25
V
IN
= V
GND
or V
DD
170
140
190
160
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 10 V; see Figure 31
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 26
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 27
R
L
= 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz;
see Figure 29
R
L
= 50 Ω, C
L
= 5 pF; see Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 28
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
DD
= +16.5 V, V
SS
= −16.5 V
Digital inputs = 0 V or V
DD
Digital inputs = 5 V
Digital inputs = 0 V or V
DD
GND = 0 V
10
−20
−80
−100
0.014
170
−0.35
23
23
116
0.001
1
220
380
0.001
1
±4.5/±16.5
Guaranteed by design; not subject to production test.
Rev. C | Page 3 of 16
ADG1411/ADG1412/ADG1413
+12 V SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
On-Resistance Match
Between Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Drain Off Leakage, I
D
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay, t
D
(ADG1413 Only)
Charge Injection, Q
INJ
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
Insertion Loss
C
S
(Off)
C
D
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
25°C
−40°C to +85°C
−40°C to +125°C
0 V to V
DD
2.8
3.5
0.13
0.21
0.6
1.1
±0.02
±0.55
±0.02
±0.55
±0.15
±1.5
4.3
4.8
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
V min/V max
Data Sheet
Test Conditions/Comments
V
S
= 0 V to 10 V, I
S
= −10 mA; see Figure 23
V
DD
= 10.8 V, V
SS
= 0 V
V
S
= 0 V to 10 V, I
S
= −10 mA
0.23
1.2
0.25
1.3
V
S
= 0 V to 10 V, I
S
= −10 mA
V
DD
= 10.8 V, V
SS
= 0 V
V
S
= 1 V/10 V, V
D
= 10 V/0 V; see Figure 24
V
S
= 1 V/10 V, V
D
= 10 V/0 V; see Figure 24
V
S
= V
D
= 1 V/10 V; see Figure 25
±2
±2
±4
±12.5
±12.5
±30
2.0
0.8
0.001
±0.1
3.5
170
250
75
135
100
V
IN
= V
GND
or V
DD
295
165
330
190
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 8 V; see Figure 31
V
S
= 6 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 26
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 27
R
L
= 50 Ω, C
L
= 5 pF; see Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 28
V
S
= 6 V, f = 1 MHz
V
S
= 6 V, f = 1 MHz
V
S
= 6 V, f = 1 MHz
V
DD
= 13.2 V
Digital inputs = 0 V or V
DD
Digital inputs = 5 V
GND = 0 V, V
SS
= 0 V
40
30
−80
−100
130
−0.5
38
40
104
0.001
1
220
V
DD
1
380
5/16.5
Guaranteed by design; not subject to production test.
Rev. C | Page 4 of 16
Data Sheet
±5 V DUAL SUPPLY
V
DD
= 5 V ± 10%, V
SS
= −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
On-Resistance Match
Between Channels, ∆R
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Drain Off Leakage, I
D
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay,
t
D
(ADG1413 Only)
Charge Injection, Q
INJ
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
Insertion Loss
C
S
(Off)
C
D
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
I
SS
V
DD
/V
SS
1
ADG1411/ADG1412/ADG1413
25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
dB typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
V min/V max
Test Conditions/Comments
3.3
4
0.13
0.22
0.9
1.1
±0.03
±0.55
±0.03
±0.55
±0.05
±1.0
4.9
5.4
V
S
= ±4.5 V, I
S
= −10 mA; see Figure 23
V
DD
= +4.5 V, V
SS
= −4.5 V
V
S
= ±4.5 V, I
S
= −10 mA
0.23
1.24
0.25
1.31
V
S
= ±4.5 V; I
S
= −10 mA
V
DD
= +5.5 V, V
SS
= −5.5 V
V
S
= ±4.5 V, V
D
=
∓4.5
V; see Figure 24
V
S
= V
D
= ±4.5 V; see Figure 25
V
S
= ±4.5 V, V
D
=
∓4.5
V; see Figure 24
±2
±2
±4
±12.5
±12.5
±30
2.0
0.8
0.001
±0.1
3.5
275
400
175
290
100
V
IN
= V
GND
or V
DD
465
320
510
380
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 3 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 3 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 3 V; see Figure 31
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 26
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 27
R
L
= 110 Ω, 5 V p-p, f = 20 Hz to 20 kHz;
see Figure 29
R
L
= 50 Ω, C
L
= 5 pF; see Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 28
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
DD
= +5.5 V, V
SS
= −5.5 V
Digital inputs = 0 V or V
DD
Digital inputs = 0 V or V
DD
GND = 0 V
50
30
−80
−100
0.03
130
−0.5
32
33
116
0.001
1.0
0.001
1.0
±4.5/±16.5
Guaranteed by design; not subject to production test.
Rev. C | Page 5 of 16
