Data Sheet
FEATURES
4.5 Ω typical on resistance
1 Ω on-resistance flatness
Up to 206 mA continuous current
±3.3 V to ±8 V dual-supply operation
3.3 V to 16 V single-supply operation
No V
L
supply required
3 V logic-compatible inputs
Rail-to-rail operation
ADG1633
16-lead TSSOP and 16-lead, 3 mm × 3 mm LFCSP
ADG1634
20-lead TSSOP and 20-lead, 4 mm × 4 mm LFCSP
4.5 Ω R
ON
, Triple/Quad SPDT ±5 V,
+12 V, +5 V, and +3.3 V Switches
ADG1633/ADG1634
FUNCTIONAL BLOCK DIAGRAMS
ADG1633
S1A
D1
S1B
S3B
D3
S2B
D2
S2A
LOGIC
S3A
IN1 IN2 IN3 EN
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
08319-001
APPLICATIONS
Communication systems
Medical systems
Audio signal routing
Video signal routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Relay replacements
Figure 1.
ADG1633
TSSOP and LFCSP
ADG1634
S1A
D1
S1B
IN1
S4A
D4
S4B
IN4
IN2
S2B
IN3
S3B
D3
S3A
GENERAL DESCRIPTION
The
ADG1633
and
ADG1634
are monolithic industrial CMOS
(iCMOS®) analog switches comprising three independently
selectable single-pole, double-throw (SPDT) switches and
four independently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An
EN input on the
ADG1633
(LFCSP and TSSOP packages) and
ADG1634
(LFCSP package only) is used to enable or disable
the devices. When disabled, all channels are switched off.
The ultralow on resistance and on-resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications, where low distortion is critical.
iCMOS
construction ensures ultralow power dissipation, making the parts
ideally suited for portable and battery-powered instruments.
D2
S2A
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
Figure 2.
ADG1634
TSSOP
ADG1634
S1A
D1
S1B
S2B
D2
S2A
LOGIC
S4A
D4
S4B
S3B
D3
S3A
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
Figure 3.
ADG1634
LFCSP
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
08319-003
IN1 IN2 IN3 IN4 EN
08319-002
ADG1633/ADG1634
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
±5 V Dual Supply ......................................................................... 3
12 V Single Supply ........................................................................ 4
5 V Single Supply .......................................................................... 5
3.3 V Single Supply ....................................................................... 6
Data Sheet
Continuous Current per Channel, S or D ..................................7
Absolute Maximum Ratings ............................................................8
ESD Caution...................................................................................8
Pin Configurations and Function Descriptions ............................9
Typical Performance Characteristics ........................................... 11
Test Circuits ..................................................................................... 14
Terminology .................................................................................... 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 19
REVISION HISTORY
8/2016—Rev. A to Rev. B
Changed CP-20-4 to CP-20-10 .................................... Throughout
Changes to Figure 5 .......................................................................... 9
Changes to Figure 7 ........................................................................ 10
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
9/2014—Rev. 0 to Rev. A
Changes to Figure 26, Figure 27, Figure 28 ................................. 14
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 19
7/2009—Revision 0: Initial Version
Rev. B | Page 2 of 19
Data Sheet
SPECIFICATIONS
±5 V DUAL SUPPLY
V
DD
= +5 V ± 10%, V
SS
= −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match Between Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
D
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise (THD + N)
−3 dB Bandwidth
C
S
(Off )
C
D
(Off )
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
V
DD
/V
SS
1
ADG1633/ADG1634
25°C
−40°C to
+85°C
−40°C to
+125°C
V
DD
to V
SS
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
nA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
V min/max
Test Conditions/Comments
4.5
5
0.12
0.25
1
1.3
±0.01
±0.1
±0.02
±0.15
±0.02
±0.15
7
0.3
1.7
8
0.35
2
V
S
= ±4.5 V, I
S
= −10 mA; see Figure 26
V
DD
= ±4.5 V, V
SS
= ±4.5 V
V
S
= ±4.5 V, I
S
= −10 mA
V
S
= ±4.5 V, I
S
= −10 mA
V
DD
= +5.5 V, V
SS
= −5.5 V
V
S
= ±4.5 V, V
D
= ±4.5 V; see Figure 27
V
S
= ±4.5V, V
D
= ±4.5 V; see Figure 27
V
S
= V
D
= ±4.5 V; see Figure 28
±1.5
±2
±2
±12
±20
±20
2.0
0.8
±1
±0.1
8
161
200
61
79
162
199
44
−12.5
−64
−64
0.3
103
19
33
57
0.001
1.0
±3.3/±8
V
IN
= V
GND
or V
DD
236
88
232
264
98
259
30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 2.5 V; see Figure 29
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 2.5 V; see Figure 31
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 2.5 V; see Figure 31
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 2.5 V; see Figure 30
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 33
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 35
R
L
= 110 Ω, V
S
= 5 V p-p, f = 20 Hz to
20 kHz; see Figure 36
R
L
= 50 Ω, C
L
= 5 pF; see Figure 34
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
S
= 0 V, f = 1 MHz
V
DD
= +5.5 V, V
SS
= −5.5 V
Digital inputs = 0 V or V
DD
Guaranteed by design, but not subject to production test.
Rev. B | Page 3 of 19
ADG1633/ADG1634
12 V SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match Between Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Drain Off Leakage, I
D
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
D
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise (THD + N)
−3 dB Bandwidth
C
S
(Off)
C
D
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
TSSOP
LFCSP
V
DD
1
Data Sheet
25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to V
DD
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
Test Conditions/Comments
4
4.5
0.12
0.25
0.9
1.2
±0.01
±0.1
±0.02
±0.15
±0.02
±0.15
6.5
0.3
1.6
7.5
0.35
1.9
V
S
= 0 V to 10 V, I
S
= −10 mA; see Figure 26
V
DD
= 10.8 V, V
SS
= 0 V
V
S
= 10 V, I
S
= −10 mA
V
S
= 0 V to 10 V, I
S
= −10 mA
V
DD
= 13.2 V, V
SS
= 0 V
V
S
= 1 V/10 V, V
D
= 10 V/1 V; see Figure 27
V
S
= 1 V/10 V, V
D
= 10 V/1 V; see Figure 27
V
S
= V
D
= 1 V or 10 V; see Figure 28
±1.5
±2
±2
±12
±20
±20
2.0
0.8
±1
±0.1
8
127
151
31
38
128
152
45
nA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
µA typ
µA max
V min/max
V
IN
= V
GND
or V
DD
182
43
180
205
47
200
30
−
12.4
−64
−64
0.3
109
19
32
56
0.001
1.0
300
480
375
600
3.3/16
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 29
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 31
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see Figure 31
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 8 V; see Figure 30
V
S
= 6 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 33
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 35
R
L
= 110 Ω, V
S
= 5 V p-p, f = 20 Hz to 20 kHz;
see Figure 36
R
L
= 50 Ω, C
L
= 5 pF; see Figure 34
V
S
= 6 V, f = 1 MHz
V
S
= 6 V, f = 1 MHz
V
S
= 6 V, f = 1 MHz
V
DD
= 12 V
Digital inputs = 0 V or V
DD
Digital inputs = 5 V
Digital inputs = 5 V
Guaranteed by design, but not subject to production test.
Rev. B | Page 4 of 19
Data Sheet
5 V SINGLE SUPPLY
V
DD
= 5 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match Between Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off )
Drain Off Leakage, I
D
(Off )
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
D
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise (THD + N)
−3 dB Bandwidth
C
S
(Off )
C
D
(Off )
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
V
DD
1
ADG1633/ADG1634
25°C
−40°C to
+85°C
−40°C to
+125°C
0 V to V
DD
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
nA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
V min/max
Test Conditions/Comments
8.5
10
0.15
0.3
1.7
2.3
±0.01
±0.1
±0.02
±0.15
±0.02
±0.15
12.5
0.35
2.7
14
0.4
3
V
S
= 0 V to 4.5 V, I
S
= −10 mA; see Figure 26
V
DD
= 4.5 V, V
SS
= 0 V
V
S
= 0 V to 4.5 V, I
S
= −10 mA
V
S
= 0 V to 4.5 V, I
S
= −10 mA
V
DD
= 5.5 V, V
SS
= 0 V
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V; see Figure 27
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V; see Figure 27
V
S
= V
D
= 1 V or 4.5 V; see Figure 28
±1.5
±2
±2
±12
±20
±20
2.0
0.8
±1
±0.1
8
199
254
68
90
201
256
57
−5
−64
−64
0.27
104
21
37
62
0.001
1.0
3.3/16
V
IN
= V
GND
or V
DD
303
102
300
337
110
333
37
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 2.5 V; see Figure 29
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 2.5 V; see Figure 31
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 2.5 V; see Figure 31
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 2.5 V; see Figure 30
V
S
= 2.5 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 33
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 35
R
L
= 110 Ω, f = 20 Hz to 20 kHz, V
S
= 3.5 V p-p;
see Figure 36
R
L
= 50 Ω, C
L
= 5 pF; see Figure 34
V
S
= 2.5 V, f = 1 MHz
V
S
= 2.5 V, f = 1 MHz
V
S
= 2.5 V, f = 1 MHz
V
DD
= 5.5 V
Digital inputs = 0 V or V
DD
Guaranteed by design, but not subject to production test.
Rev. B | Page 5 of 19
