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ADG3257BRQZ

Translation - Voltage Levels Hi Spd 3.3V/5V Quad 2:1 w/ Bus Switch

器件类别:逻辑    逻辑   

厂商名称:ADI(亚德诺半导体)

厂商官网:https://www.analog.com

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器件参数
参数名称
属性值
Brand Name
Analog Devices Inc
是否无铅
含铅
是否Rohs认证
符合
厂商名称
ADI(亚德诺半导体)
零件包装代码
SSOP
包装说明
SSOP, SSOP16,.25
针数
16
制造商包装代码
RQ-16
Reach Compliance Code
compliant
ECCN代码
EAR99
Samacsys Description
ADG3257BRQZ, Multiplexer Quad 2:1, 16-Pin, QSOP
系列
3257
JESD-30 代码
R-PDSO-G16
JESD-609代码
e3
长度
4.9022 mm
逻辑集成电路类型
MULTIPLEXER AND DEMUX/DECODER
湿度敏感等级
1
功能数量
1
输入次数
1
输出次数
1
端子数量
16
最高工作温度
85 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
SSOP
封装等效代码
SSOP16,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度)
260
电源
3.3/5 V
传播延迟(tpd)
0.1 ns
认证状态
Not Qualified
座面最大高度
1.7526 mm
最大供电电压 (Vsup)
3.63 V
最小供电电压 (Vsup)
2.97 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子节距
0.635 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
40
宽度
3.9116 mm
Base Number Matches
1
文档预览
High Speed, 3.3 V/5 V Quad 2:1 Mux/Demux
(4-Bit, 1 of 2) Bus Switch
ADG3257
FEATURES
100 ps propagation delay through the switch
2 Ω switches connect inputs to outputs
Data rates up to 933 Mbps
Single 3.3 V/5 V supply operation
Level translation operation
Ultralow quiescent supply current (1 nA typical)
3.5 ns switching
Switches remain in the off state when power is off
Standard 3257 type pinout
1A
FUNCTIONAL BLOCK DIAGRAM
1B
1
1B
2
2B
1
2B
2
3B
1
3B
2
4B
1
4B
2
2A
3A
4A
APPLICATIONS
Bus switching
Bus isolation
Level translation
Memory switching/interleaving
LOGIC
02914-001
BE
S
Figure 1.
GENERAL DESCRIPTION
The ADG3257 is a CMOS bus switch comprised of four 2:1
multiplexers/demultiplexers with high impedance outputs. The
device is manufactured on a CMOS process. This provides low
power dissipation yet high switching speed and very low on
resistance, allowing the inputs to be connected to the outputs
without adding propagation delay or generating additional
ground bounce noise.
The ADG3257 operates from a single 3.3 V/5 V supply. The
control logic for each switch is shown in Table 1. These switches
are bidirectional when on. In the off state, signal levels are blocked
up to the supplies. When the power supply is off, the switches
remain in the off state, isolating Port A and Port B.
This bus switch is suited to both switching and level translation
applications. It can be used in applications requiring level trans-
lation from 3.3 V to 2.5 V when powered from 3.3 V. Additionally,
with a diode connected in series with 5 V V
DD
, the ADG3257
may also be used in applications requiring 5 V to 3.3 V level
translation.
Table 1. Truth Table
BE
H
L
L
S
X
L
H
Function
Disable
A = B
1
A = B
2
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
0.1 ns propagation delay through switch.
2 Ω switches connect inputs to outputs.
Bidirectional operation.
Ultralow power dissipation.
16-lead QSOP package.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no re-
sponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2008 Analog Devices, Inc. All rights reserved.
ADG3257
TABLE OF CONTENTS
Features .............................................................................................. 1
 
Applications ....................................................................................... 1
 
Functional Block Diagram .............................................................. 1
 
General Description ......................................................................... 1
 
Product Highlights ........................................................................... 1
 
Revision History ............................................................................... 2
 
Specifications..................................................................................... 3
 
Absolute Maximum Ratings............................................................ 5
 
ESD Caution .................................................................................. 5
 
Pin Configuration and Function Descriptions..............................6
 
Typical Performance Characteristics ..............................................7
 
Test Circuits ........................................................................................9
 
Applications Information .............................................................. 10
 
Mixed Voltage Operation, Level Translation .......................... 10
 
Memory Switching ..................................................................... 10
 
Outline Dimensions ....................................................................... 11
 
Ordering Guide .......................................................................... 11
 
REVISION HISTORY
03/08—Rev. D to Rev. E
Updated Format .................................................................... Universal
Changes to Features.............................................................................1
Changes to General Description .......................................................1
Changes to Absolute Maximum Ratings ..........................................5
Changes to Pin Configuration and Function Descriptions ...........6
Changes to Test Circuits .....................................................................9
Changes to Ordering Guide ...............................................................11
11/04—Rev. C to Rev. D
Changes to Specifications ...................................................................2
Changes to Ordering Guide ...............................................................4
04/03—Rev. A to Rev. B
Updated Outline Dimensions ............................................................8
06/02—Rev. 0 to Rev. A
Edits to Features ...................................................................................1
Rev. E | Page 2 of 12
ADG3257
SPECIFICATIONS
V
CC
= 5.0 V ± 10%, GND = 0 V. All specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
1
DC ELECTRICAL CHARACTERISTICS
Input High Voltage
Input Low Voltage
Input Leakage Current
Off State Leakage Current
On State Leakage Current
Maximum Pass Voltage
4
CAPACITANCE
4
A Port Off Capacitance
B Port Off Capacitance
A, B Port On Capacitance
Control Input Capacitance
SWITCHING CHARACTERISTICS
4
Propagation Delay A to B or B to A, t
PD
Propagation Delay Matching
6
Bus Enable Time BE to A or B
Bus Disable Time BE to A or B
Bus Select Time S to A or B
Enable
Disable
Maximum Data Rate
DIGITAL SWITCH
On Resistance
Symbol
V
INH
V
INL
I
I
I
OZ
I
OZ
V
P
C
A
OFF
C
B
OFF
C
A
, C
B
ON
C
IN
t
PHL
, t
PLH 5
t
PZH
, t
PZL
t
PHZ
, t
PLZ
t
SEL_EN
t
SEL_DIS
Conditions
2
B Version
Min
Typ
3
Max
2.4
−0.3
0 ≤ V
IN
≤ 5.5 V
0 ≤ A, B ≤ V
CC
0 ≤ A, B ≤ V
CC
V
IN
= V
CC
= 5 V, I
O
= −5 μA
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
A
= 0 V, C
L
= 50 pF
V
A
= 0 V, C
L
= 50 pF
C
L
= 50 pF, R
L
= 500 Ω
C
L
= 50 pF, R
L
= 500 Ω
C
L
= 50 pF, R
L
= 500 Ω
C
L
= 50 pF, R
L
= 500 Ω
V
A
= 2 V p-p
V
A
= 0 V
I
O
= 48 mA, 15 mA, 8 mA, T
A
= 25°C
I
O
= 48 mA, 15 mA, 8 mA
V
A
= 2.4 V
I
O
= 48 mA, 15 mA, 8 mA, T
A
= 25°C
I
O
= 48 mA, 15 mA, 8 mA
V
A
= 0 V, I
O
= 48 mA, 15 mA, 8 mA
3.0
I
CC
ΔI
CC
Digital inputs = 0 V or V
CC
V
CC
= 5.5 V, one input at 3.0 V; others at V
CC
or GND
0.001
±0.01
±0.01
±0.01
4.2
7
5
11
4
0.10
0.035
7.5
7
12
8
Unit
V
V
μA
μA
μA
V
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
Mbps
3.9
+0.8
±1
±1
±1
4.4
1
1
0.0075
5
3.5
8
5
933
R
ON
2
4
5
6
7
Ω
Ω
Ω
Ω
Ω
V
μA
μA
3
0.15
On-Resistance Matching
POWER REQUIREMENTS
V
CC
Quiescent Power Supply Current
Increase in I
CC
per Input
4, 7
1
2
ΔR
ON
5.5
1
200
Temperature range is: Version B: –40°C to +85°C.
See Test Circuits section.
3
All typical values are at T
A
= 25°C, unless otherwise noted.
4
Guaranteed by design, not subject to production test.
5
The digital switch contributes no propagation delay other than the RC delay of the typical R
ON
of the switch and the load capacitance when driven by an ideal voltage
source. Because the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation
delay of the digital switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
6
Propagation delay matching between channels is calculated from on-resistance matching of worst-case channel combinations and load capacitance.
7
This current applies to the control pins only and represents the current required to switch internal capacitance at the specified frequency. The A and B ports contribute
no significant ac or dc currents as they transition.
Rev. E | Page 3 of 12
ADG3257
V
CC
= 3.3 V ± 10%, GND = 0 V. All specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter
DC ELECTRICAL CHARACTERISTICS
Input High Voltage
Input Low Voltage
Input Leakage Current
Off State Leakage Current
On State Leakage Current
Maximum Pass Voltage
4
CAPACITANCE
4
A Port Off Capacitance
B Port Off Capacitance
A, B Port On Capacitance
Control Input Capacitance
SWITCHING CHARACTERISTICS
4
Propagation Delay A to B or B to A, t
PD
Propagation Delay Matching
6
Bus Enable Time BE to A or B
Bus Disable Time BE to A or B
Bus Select Time S to A or B
Enable
Disable
Maximum Data Rate
DIGITAL SWITCH
On Resistance
1
Symbol
V
INH
V
INL
I
I
I
OZ
I
OZ
V
P
C
A
OFF
C
B
OFF
C
A
, C
B
ON
C
IN
t
PHL
, t
PLH 5
t
PZH
, t
PZL
t
PHZ
, t
PLZ
t
SEL_EN
t
SEL_DIS
Conditions
2
B Version
Min Typ
3
Max
2.0
−0.3
Unit
V
V
μA
μA
μA
V
pF
pF
pF
pF
0 ≤ V
IN
≤ 3.6 V
0 ≤ A, B ≤ V
CC
0 ≤ A, B ≤ V
CC
V
IN
= V
CC
= 3.3 V, I
O
= −5 μA
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
A
= 0 V, C
L
= 50 pF
V
A
= 0 V, C
L
= 50 pF
C
L
= 50 pF, R
L
= 500 Ω
C
L
= 50 pF, R
L
= 500 Ω
C
L
= 50 pF, R
L
= 500 Ω
C
L
= 50 pF, R
L
= 500 Ω
V
A
= 2 V p-p
V
A
= 0 V, I
O
= 15 mA, 8 mA, T
A
= 25°C
V
A
= 0 V, I
o
= 15 mA, 8 mA
V
A
= 1 V, I
O
= 15 mA, 8 mA, T
A
= 25°C
V
A
= 1 V, I
o
= 15 mA, 8 mA
V
A
= 0 V, I
O
= 15 mA, 8 mA
2.3
±0.01
±0.01
±0.01
2.6
7
5
11
4
+0.8
±1
±1
±1
2.8
1
1
0.01
5.5
4.5
8
6
933
2
4
0.2
0.10
0.04
9
8.5
12
9
ns
ns
ns
ns
ns
ns
Mbps
Ω
Ω
Ω
Ω
Ω
V
μA
μA
R
ON
4
5
7
8
On-Resistance Matching
POWER REQUIREMENTS
V
CC
Quiescent Power Supply Current
Increase in I
CC
per Input
4, 7
1
2
ΔR
ON
3.0
I
CC
ΔI
CC
Digital inputs = 0 V or V
CC
V
CC
= 3.3 V, one input at 3.0 V; others at V
CC
or GND
0.001
5.5
1
200
Temperature range is: Version B: −40°C to +85°C.
See Test Circuits section.
3
All typical values are at T
A
= 25°C, unless otherwise noted.
4
Guaranteed by design, not subject to production test.
5
The digital switch contributes no propagation delay other than the RC delay of the typical R
ON
of the switch and the load capacitance when driven by an ideal voltage
source. Because the time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagation delay to the system. Propagation
delay of the digital switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
6
Propagation delay matching between channels is calculated from on-resistance matching of worst-case channel combinations and load capacitance.
7
This current applies to the control pins only and represents the current required to switch internal capacitance at the specified frequency. The A and B ports contribute
no significant ac or dc currents as they transition.
Rev. E | Page 4 of 12
ADG3257
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 4.
Parameter
V
CC
to GND
Digital Inputs to GND
DC Input Voltage
DC Output Current
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
QSOP Package
θ
JA
Thermal Impedance
Lead Soldering
Lead Temperature, Soldering (10 sec)
IR Reflow, Peak Temperature (<20 sec)
Soldering (Pb-Free)
Reflow, Peak Temperature
Time at Peak Temperature
Rating
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to +6 V
100 mA
−40°C to +85°C
−65°C to +150°C
150°C
149.97°C/W
300°C
220°C
260(+0/−5)°C
20 sec to 40 sec
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational sec-
tion of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. E | Page 5 of 12
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参数对比
与ADG3257BRQZ相近的元器件有:ADG3257BRQZ-REEL。描述及对比如下:
型号 ADG3257BRQZ ADG3257BRQZ-REEL
描述 Translation - Voltage Levels Hi Spd 3.3V/5V Quad 2:1 w/ Bus Switch Translation - Voltage Levels Hi Spd 3.3V/5V Quad 2:1 w/ Bus Switch
Brand Name Analog Devices Inc Analog Devices Inc
是否无铅 含铅 含铅
是否Rohs认证 符合 符合
厂商名称 ADI(亚德诺半导体) ADI(亚德诺半导体)
零件包装代码 SSOP SOIC
包装说明 SSOP, SSOP16,.25 SSOP, SSOP16,.25
针数 16 16
制造商包装代码 RQ-16 RQ-16
Reach Compliance Code compliant compliant
ECCN代码 EAR99 EAR99
系列 3257 3257
JESD-30 代码 R-PDSO-G16 R-PDSO-G16
JESD-609代码 e3 e3
长度 4.9022 mm 4.9022 mm
逻辑集成电路类型 MULTIPLEXER AND DEMUX/DECODER MULTIPLEXER AND DEMUX/DECODER
湿度敏感等级 1 1
功能数量 1 4
输入次数 1 1
输出次数 1 2
端子数量 16 16
最高工作温度 85 °C 85 °C
最低工作温度 -40 °C -40 °C
输出特性 3-STATE 3-STATE
输出极性 TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SSOP SSOP
封装等效代码 SSOP16,.25 SSOP16,.25
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度) 260 260
电源 3.3/5 V 3.3/5 V
传播延迟(tpd) 0.1 ns 0.1 ns
认证状态 Not Qualified Not Qualified
座面最大高度 1.7526 mm 1.7526 mm
最大供电电压 (Vsup) 3.63 V 5.5 V
最小供电电压 (Vsup) 2.97 V 3 V
标称供电电压 (Vsup) 3.3 V 3.3 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL
端子面层 Matte Tin (Sn) Matte Tin (Sn)
端子形式 GULL WING GULL WING
端子节距 0.635 mm 0.635 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 40 40
宽度 3.9116 mm 3.9116 mm
Base Number Matches 1 1
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