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ADG409TQ

IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP16, CERAMIC, DIP-16, Multiplexer or Switch

器件类别:模拟混合信号IC    信号电路   

厂商名称:ADI(亚德诺半导体)

厂商官网:https://www.analog.com

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
ADI(亚德诺半导体)
零件包装代码
DIP
包装说明
CERAMIC, DIP-16
针数
16
Reach Compliance Code
unknown
ECCN代码
EAR99
其他特性
CAN ALSO OPERATE WITH 12V SUPPLY
模拟集成电路 - 其他类型
DIFFERENTIAL MULTIPLEXER
JESD-30 代码
R-GDIP-T16
JESD-609代码
e0
长度
19.05 mm
标称负供电电压 (Vsup)
-15 V
信道数量
4
功能数量
1
端子数量
16
标称断态隔离度
75 dB
通态电阻匹配规范
15 Ω
最大通态电阻 (Ron)
100 Ω
最高工作温度
125 °C
最低工作温度
-55 °C
封装主体材料
CERAMIC, GLASS-SEALED
封装代码
DIP
封装等效代码
DIP16,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
12/+-15 V
认证状态
Not Qualified
座面最大高度
5.08 mm
最大信号电流
0.02 A
最大供电电流 (Isup)
2 mA
标称供电电压 (Vsup)
15 V
表面贴装
NO
最长断开时间
150 ns
最长接通时间
150 ns
切换
BREAK-BEFORE-MAKE
技术
CMOS
温度等级
MILITARY
端子面层
TIN LEAD
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
7.62 mm
文档预览
a
FEATURES
44 V Supply Maximum Ratings
V
SS
to V
DD
Analog Signal Range
Low On Resistance (100 max)
Low Power (I
SUPPLY
< 75 A)
Fast Switching
Break-Before-Make Switching Action
Plug-in Replacement for DG408/DG409
APPLICATIONS
Audio and Video Routing
Automatic Test Equipment
Data Acquisition Systems
Battery Powered Systems
Sample and Hold Systems
Communication Systems
LC MOS 4-/8-Channel
High Performance Analog Multiplexers
ADG408/ADG409
FUNCTIONAL BLOCK DIAGRAMS
ADG408
S1
S1A
DA
S4A
D
S1B
DB
S8
1 OF 8
DECODER
S4B
1 OF 4
DECODER
2
ADG409
A0 A1 A2 EN
A0
A1
EN
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG408 and ADG409 are monolithic CMOS analog
multiplexers comprising eight single channels and four differen-
tial channels respectively. The ADG408 switches one of eight
inputs to a common output as determined by the 3-bit binary
address lines A0, A1 and A2. The ADG409 switches one of four
differential inputs to a common differential output as deter-
mined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched OFF.
The ADG408/ADG409 are designed on an enhanced LC
2
MOS
process which provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when ON and has an input signal
range that extends to the supplies. In the OFF condition, signal
levels up to the supplies are blocked. All channels exhibit break-
before-make switching action, preventing momentary shorting
when switching channels. Inherent in the design is low charge
injection for minimum transients when switching the digital
inputs.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 Analog Multiplexers.
1. Extended Signal Range
The ADG408/ADG409 are fabricated on an enhanced
LC
2
MOS process giving an increased signal range that
extends to the supply rails.
2. Low Power Dissipation
3 Low R
ON
4. Single Supply Operation
For applications where the analog signal is unipolar, the
ADG408/ADG409 can be operated from a single rail power
supply. The parts are fully specified with a single +12 V
power supply and will remain functional with single supplies
as low as +5 V.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
ADG408/ADG409–SPECIFICATIONS
DUAL SUPPLY
1
Parameter
ANALOG SWITCH
Analog Signal Range
R
ON
∆R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Drain OFF Leakage I
D
(OFF)
ADG408
ADG409
Channel ON Leakage I
D
, I
S
(ON)
ADG408
ADG409
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
t
OPEN
t
ON
(EN)
t
OFF
(EN)
Charge Injection
OFF Isolation
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
ADG408
ADG409
C
D
, C
S
(ON)
ADG408
ADG409
POWER REQUIREMENTS
I
DD
I
SS
I
DD
100
200
20
–75
85
11
40
20
54
34
1
5
1
5
500
100
200
10
85
150
(V
DD
= +15 V, V
SS
= –15 V, GND = 0 V, unless otherwise noted)
B Version
–40 C to
+25 C
+85 C
V
SS
to V
DD
40
100
15
±
0.5
±
1
±
1
±
1
±
1
125
40
100
15
±
0.5
±
1
±
1
±
1
±
1
T Version
–55 C to
+25 C +125 C
Units
Test Conditions/Comments
V
SS
to V
DD
V
typ
125
max
max
±
50
±
100
±
50
±
100
±
50
2.4
0.8
±
10
nA max
nA max
nA max
nA max
nA max
V min
V max
µA
max
pF typ
ns typ
ns max
ns min
ns typ
ns max
ns typ
ns max
pC typ
dB typ
dB typ
pF typ
pF typ
pF typ
V
D
=
±
10 V, I
S
= –10 mA
V
D
= +10 V, –10 V
V
D
=
±
10 V, V
S
=
Test Circuit 2
V
D
=
±
10 V; V
S
=
Test Circuit 3
V
S
= V
D
=
±
10 V;
Test Circuit 4
10 V;
10 V;
±
50
±
100
±
50
±
100
±
50
2.4
0.8
±
10
8
120
250
10
125
225
65
150
8
120
250
10
85
150
20
–75
85
11
40
20
54
34
1
5
1
5
500
10
125
225
65
150
V
IN
= 0 or V
DD
f = 1 MHz
R
L
= 300
Ω,
C
L
= 35 pF;
V
S1
=
±
10 V, V
SS
= 10 V;
Test Circuit 5
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +5 V; Test Circuit 6
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +5 V; Test Circuit 7
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +5 V; Test Circuit 7
V
S
= 0 V, R
S
= 0
Ω,
C
L
= 10 nF;
Test Circuit 8
R
L
= 1 kΩ, f = 100 kHz;
V
EN
= 0 V; Test Circuit 9
R
L
= 1 kΩ, f = 100 kHz;
Test Circuit 10
f = 1 MHz
f = 1 MHz
f = 1 MHz
pF typ
pF typ
µA
typ
µA
max
µA
typ
µA
max
µA
typ
µA
max
V
IN
= 0 V, V
EN
= 0 V
V
IN
= 0 V, V
EN
= 2.4 V
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. A
ADG408/ADG409
SINGLE SUPPLY
1
Parameter
ANALOG SWITCH
Analog Signal Range
R
ON
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
Drain OFF Leakage I
D
(OFF)
ADG408
ADG409
Channel ON Leakage I
D
, I
S
(ON)
ADG408
ADG409
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
t
OPEN
t
ON
(EN)
t
OFF
(EN)
Charge Injection
OFF Isolation
Channel-to-Channel Crosstalk
C
S
(OFF)
C
D
(OFF)
ADG408
ADG409
C
D
, C
S
(ON)
ADG408
ADG409
POWER REQUIREMENTS
I
DD
I
DD
100
200
(V
DD
= +12 V, V
SS
= 0 V, GND = 0 V, unless otherwise noted)
B Version
–40 C to
+25 C
+85 C
0 to V
DD
90
±
0.5
±
1
±
1
±
1
±
1
±
50
±
100
±
50
±
100
±
50
2.4
0.8
±
10
8
130
10
140
60
5
–75
85
11
40
20
54
34
1
5
500
100
200
8
130
10
140
60
5
–75
85
11
40
20
54
34
1
5
500
90
±
0.5
±
1
±
1
±
1
±
1
±
50
±
100
±
50
±
100
±
50
2.4
0.8
±
10
T Version
–55 C to
+25 C +125 C
0 to V
DD
Units
V
typ
nA max
nA max
nA max
nA max
nA max
V min
V max
µA
max
pF typ
ns typ
ns typ
ns typ
ns typ
pC typ
dB typ
dB typ
pF typ
pF typ
pF typ
Test Conditions/Comments
V
D
= +3 V, +10 V, I
S
= –1 mA
V
D
=8 V/0 V, V
S
= 0 V/8 V;
Test Circuit 2
V
D
=8 V/0 V, V
S
= 0 V/8 V;
Test Circuit 3
V
S
= V
D
= 8 V/0 V;
Test Circuit 4
V
IN
= 0 or V
DD
f = 1 MHz
R
L
= 300
Ω,
C
L
= 35 pF;
V
S1
= 8 V/0 V, V
S8
= 0 V/8 V;
Test Circuit 5
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +5 V; Test Circuit 6
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +5 V; Test Circuit 7
R
L
= 300
Ω,
C
L
= 35 pF;
V
S
= +5 V; Test Circuit 7
V
S
= 0 V, R
S
= 0
Ω,
C
L
= 10 nF;
Test Circuit 8
R
L
= 1 kΩ, f = 100 kHz;
V
EN
= 0 V; Test Circuit 9
R
L
= 1 kΩ, f = 100 kHz;
Test Circuit 10
f = 1 MHz
f = 1 MHz
f = 1 MHz
pF typ
pF typ
µA
typ
µA
max
µA
typ
µA
max
V
IN
= 0 V, V
EN
= 0 V
V
IN
= 0 V, V
EN
= 2.4 V
NOTES
1
Temperature ranges are as follows: B Version: –40°C to +85°C; T Version: –55°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. A
–3–
ADG408/ADG409
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
ORDERING INFORMATION
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+44 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V
Analog, Digital Inputs
2
. . . . . V
SS
–2 V to V
DD
+2 V or 20 mA,
Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 20 mA
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle max) . . . . . . . . . . . 40 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Extended (T Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Cerdip Package, Power Dissipation . . . . . . . . . . . . . . . 900 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 76°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +300°C
Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 117°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . +260°C
TSSOP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 155°C/W
θ
JC
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 50°C/W
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW
θ
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 77°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at A, EN, S or D will be clamped by internal diodes. Current should
be limited to the maximum ratings given.
Model
1
ADG408BN
ADG408BR
ADG408BRU
ADG408TQ
ADG409BN
ADG409BR
ADG409TQ
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
Package Option
2
N-16
R-16A
RU-16
Q-16
N-16
R-16A
Q-16
NOTES
1
To order MIL-STD-883, Class B processed parts, add /883B to T grade part
numbers.
2
N = Plastic DIP; Q = Cerdip; R = 0.15" Small Outline IC (SOIC);
RU = Think Shrink Small Outline Package (TSSOP).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG408/ADG409 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. A
ADG408/ADG409
PIN CONFIGURATIONS (DIP/SOIC/TSSOP)
TERMINOLOGY
V
DD
A0
1
EN
2
V
SS 3
S1
4
16
A1
15
A2
14
GND
Most positive power supply potential.
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
Ground (0 V) reference.
Ohmic resistance between D and S.
Difference between the R
ON
of any two
channels.
Source leakage current when the switch is off.
Drain leakage current when the switch is off.
Channel leakage current when the switch is on.
Analog voltage on terminals D, S.
Channel input capacitance for “OFF”
condition.
Channel output capacitance for “OFF”
condition.
“ON” switch capacitance.
Digital input capacitance.
Delay time between the 50% and 90% points of
the digital input and switch “ON” condition.
Delay time between the 50% and 90% points of
the digital input and switch “OFF” condition.
Delay time between the 50% and 90% points of
the digital inputs and the switch “ON” condition
when switching from one address state to another.
“OFF” time measured between the 80% point
of both switches when switching from one
address state to another.
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
A measure of unwanted signal coupling through
an “OFF” channel.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
Positive supply current.
Negative supply current.
A0
1
EN
2
V
SS 3
S1A
4
16
A1
15
GND
14
V
DD
V
SS
ADG408
13
V
DD
TOP VIEW
S2
5
(Not to Scale)
12
S5
S3
6
S4
7
D
8
11
S6
10
S7
9
ADG409
13
S1B
TOP VIEW
S2A
5
(Not to Scale)
12
S2B
S3A
6
S4A
7
DA
8
11
S3B
10
S4B
9
GND
R
ON
∆R
ON
I
S
(OFF)
S8
DB
ADG408 Truth Table
I
D
(OFF)
ON
SWITCH
NONE
1
2
3
4
5
6
7
8
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
C
IN
t
ON
(EN)
t
OFF
(EN)
A2
X
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ADG409 Truth Table
Al
X
0
0
1
1
A0
X
0
1
0
1
EN
0
1
1
1
1
ON SWITCH
PAIR
NONE
1
2
3
4
t
TRANSITION
t
OPEN
V
INL
V
INH
I
INL
(I
INH
)
Crosstalk
Off Isolation
Charge
Injection
I
DD
I
SS
REV. A
–5–
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