Data Sheet
FEATURES
0.5 Ω typical on resistance
0.8 Ω maximum on resistance at 125°C
1.65 V to 3.6 V operation
Automotive temperature range: –40°C to +125°C
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast-switching times <20 ns
Typical power consumption (<0.1 µW)
0.5 Ω CMOS, 1.65 V TO 3.6 V,
Dual SPDT/2:1 MUX
ADG836
FUNCTIONAL BLOCK DIAGRAM
ADG836
S1A
D1
S1B
IN1
IN2
S2A
D2
S2B
04308-001
APPLICATIONS
Cellular phones
PDAs
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communication systems
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
GENERAL DESCRIPTION
The
ADG836
is a low voltage complementary metal-oxide
semiconductor (CMOS) device containing two independently
selectable single-pole, double-throw (SPDT) switches. This
device offers an ultralow on resistance of less than 0.8 Ω over
the full temperature range. The
ADG836
is fully specified for
3.3 V, 2.5 V, and 1.8 V supply operation.
Each switch conducts equally well in both directions when on,
and has an input signal range that extends to the supplies. The
ADG836
exhibits break-before-make switching action.
The
ADG836
is available in a 10-lead MSOP and in a 3 mm ×
3 mm 12-lead LFCSP.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
6.
<0.8 Ω over full temperature range of –40°C to +125°C.
Single 1.65 V to 3.6 V operation.
Compatible with 1.8 V CMOS logic.
High current handling capability (300 mA continuous
current at 3.3 V).
Low total harmonic distortion plus noise (THD + N)
(0.02% typical).
3 mm × 3 mm LFCSP and 10-lead MSOP.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADG836* PRODUCT PAGE QUICK LINKS
Last Content Update: 06/30/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DESIGN RESOURCES
•
ADG836 Material Declaration
•
PCN-PDN Information
•
Quality And Reliability
•
Symbols and Footprints
EVALUATION KITS
•
Evaluation Board for 10-Lead MSOP Devices in the
Switches and Multiplexers Portfolio
DOCUMENTATION
Data Sheet
• ADG836: 0.5 Ω CMOS, 1.65 V TO 3.6 V, Dual SPDT/2:1 MUX
Data Sheet
User Guides
•
UG-1037: Evaluation Board for 10-Lead MSOP Devices in
the Switches and Multiplexers Portfolio
DISCUSSIONS
View all ADG836 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
REFERENCE MATERIALS
Product Selection Guide
•
Switches and Multiplexers Product Selection Guide
Technical Articles
•
CMOS Switches Offer High Performance in Low Power,
Wideband Applications
•
Data-acquisition system uses fault protection
•
Enhanced Multiplexing for MEMS Optical Cross Connects
•
Temperature monitor measures three thermal zones
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
ADG836
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 6
Data Sheet
ESD Caution...................................................................................6
Pin Configurations and Function Descriptions ............................7
Typical Performance Characteristics ..............................................8
Test Circuits ..................................................................................... 11
Terminology .................................................................................... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
6/2016—Rev. A to Rev. B
Changed CP-12-1 to CP-12-4 ...................................... Throughout
Changes to Figure 3 and Table 6 ..................................................... 7
Added Terminology Section ......................................................... 13
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
4/2005—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Table 3 ............................................................................ 5
Changes to Ordering Guide .......................................................... 13
8/2003—Revision 0: Initial Version
Rev. B | Page 2 of 16
Data Sheet
SPECIFICATIONS
V
DD
= 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. The temperature range for the Y version is −40°C to +125°C.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
+25°C
−40°C to +85°C
−40°C to +125°C
0 V to V
DD
0.5
0.65
0.04
0.1
0.15
LEAKAGE CURRENTS
Source Off Leakage I
S
(OFF)
Channel On Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-Before-Make Time Delay (t
BBM
)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
±0.2
±0.2
2
0.8
0.005
±0.1
4
21
26
4
7
17
40
−67
−90
−67
Total Harmonic Distortion Plus Noise
(THD + N)
Insertion Loss
−3 dB Bandwidth
C
S
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
I
DD
0.02
−0.05
57
25
75
0.003
1
1
ADG836
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA typ
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
µA typ
µA max
Test Conditions/Comments
V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
S
= 100 mA;
Figure 19
V
DD
= 2.7 V, V
S
= 0.65 V, I
S
= 100 mA
V
DD
= 2.7 V, V
S
= 0 V to V
DD
I
S
= 100 mA
V
DD
= 3.6 V
V
S
= 0.6 V/3.3 V, V
D
= 3.3 V/0.6 V;
Figure 20
V
S
= V
D
= 0.6 V or 3.3 V; Figure 21
0.75
0.075
0.8
0.08
0.16
On-Resistance Match Between
Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT (ON)
)
V
IN
= V
INL
or V
INH
28
8
29
9
5
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 1.5 V/0 V; Figure 22
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 1.5 V; Figure 22
R
L
= 50 Ω, C
L
= 35 pF
V
S1
= V
S2
= 1.5 V; Figure 23
V
S
= 1.5 V, R
S
= 0 Ω, C
L
= 1 nF; Figure 24
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz;
Figure 25
S1A to S2A/S1B to S2B, R
L
= 50 Ω,
C
L
= 5 pF, f = 100 kHz; Figure 28
S1A to S1B/S2A to S2B, R
L
= 50 Ω,
C
L
= 5 pF, f = 100 kHz; Figure 27
R
L
= 32 Ω, f = 20 Hz to 20 kHz,
V
S
= 2 V p-p
R
L
= 50 Ω, C
L
= 5 pF; Figure 26
R
L
= 50 Ω, C
L
= 5 pF; Figure 26
V
DD
= 3.6 V
Digital inputs = 0 V or 3.6 V
4
Guaranteed by design, not subject to production test.
Rev. B | Page 3 of 16
ADG836
V
DD
= 2.5 V ± 0.2 V, GND = 0 V, unless otherwise noted. The temperature range for the Y version is −40°C to +125°C.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match Between
Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT (ON)
)
LEAKAGE CURRENTS
Source Off Leakage I
S
(OFF)
Channel On Leakage I
D
, I
S
(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
C
IN
, Digital Input Capacitance
DYNAMIC CHARACTERISTICS
1
t
ON
t
OFF
Break-before-Make Time Delay (t
BBM
)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
+25°C −40°C to +85°C −40°C to +125°C Unit
0 V to V
DD
0.65
0.72
0.04
0.16
0.23
±0.2
±0.2
1.7
0.7
0.005
±0.1
4
23
29
5
7
17
30
−67
−90
−67
Total Harmonic Distortion Plus Noise
(THD + N)
Insertion Loss
−3 dB Bandwidth
C
S
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
I
DD
0.022
−0.06
57
25
75
0.003
1
1
Data Sheet
Test Conditions/Comments
0.8
0.08
0.88
0.085
0.24
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA typ
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
dB typ
%
V
DD
= 2.3 V, V
S
= 0 V to V
DD,
I
S
= 100 mA; Figure 19
V
DD
= 2.3 V, V
S
= 0.7 V, I
S
= 100 mA
V
DD
= 2.3 V, V
S
= 0 V to V
DD,
I
S
= 100 mA
V
DD
= 2.7 V
V
S
= 0.6 V/2.4 V, V
D
= 2.4 V/0.6 V; Figure 20
V
S
= V
D
= 0.6 V or 2.4 V; Figure 21
V
IN
= V
INL
or V
INH
30
8
31
9
5
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 1.5 V/0 V; Figure 22
R
L
= 50 Ω, C
L
= 35 pF
V
S
= 1.5 V; Figure 22
R
L
= 50 Ω, C
L
= 35 pF
V
S1
= V
S2
= 1.5 V; Figure 23
V
S
= 1.25 V, R
S
= 0 Ω, C
L
= 1 nF; Figure 24
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; Figure 25
S1A to S2A/S1B to S2B, R
L
= 50
Ω,
C
L
= 5 pF,
f = 100 kHz; Figure 28
S1A to S1B/S2A to S2B, R
L
= 50 Ω, C
L
= 5 pF,
f = 100 kHz; Figure 27
R
L
= 32 Ω, f = 20 Hz to 20 kHz, V
S
= 1.5 V p-p
4
dB typ
R
L
= 50 Ω, C
L
= 5 pF; Figure 26
MHz typ R
L
= 50 Ω, C
L
= 5 pF; Figure 26
pF typ
pF typ
V
DD
= 2.7 V
µA typ
Digital inputs = 0 V or 2.7 V
µA max
Guaranteed by design, not subject to production test.
Rev. B | Page 4 of 16
