3.3 V Slew Rate Limited, Half- and
Full-Duplex, RS-485/RS-422 Transceivers
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
FEATURES
Operate with 3.3 V supply
Interoperable with 5 V logic
EIA RS-422 and RS-485 compliant over full
common-mode range
Data rate options
ADM3483/ADM3488: 250 kbps
ADM3485/ADM3490/ADM3491: 10 Mbps
Half- and full-duplex options
Reduced slew rates for low EMI (ADM3483 and ADM3488)
2 nA supply current in shutdown mode
(ADM3483/ADM3485/ADM3491)
Up to 32 transceivers on the bus
−7 V to +12 V bus common-mode range
Specified over the –40°C to +85°C temperature range
8 ns skew (ADM3485/ADM3490/ADM3491)
8-lead SOIC and 14-lead SOIC (ADM3491 only) packages
FUNCTIONAL BLOCK DIAGRAMS
V
CC
ADM3483/
ADM3485
RO
RE
DE
DI
D
R
A
B
05524-027
GND
Figure 1.
V
CC
A
B
RO
R
APPLICATIONS
Low power RS-485/RS-422 applications
Telecom
Industrial process control
HVAC
DI
ADM3488/
ADM3490
Z
Y
GND
05524-026
05524-025
D
Figure 2.
GENERAL DESCRIPTION
The ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 are
low power, differential line transceivers designed to operate using a
single 3.3 V power supply. Low power consumption, coupled with a
shutdown mode, makes the ADM3483/ADM3485/ADM3488/
ADM3490/ADM3491 ideal for power-sensitive applications.
The ADM3488/ADM3490/ADM3491 feature full-duplex com-
munication, while the ADM3483/ADM3485 are designed for
half-duplex communication.
The ADM3483/ADM3488 feature slew rate limited drivers that
minimize EMI and reduce reflections caused by improperly ter-
minated cables, allowing error-free data transmission at data rates
up to 250 kbps.
The ADM3485/ADM3490/ADM3491 transmit at up to 10 Mbps.
The receiver input impedance is 12 kΩ, allowing up to 32 trans-
ceivers to be connected on the bus. A thermal shutdown circuit
prevents excessive power dissipation caused by bus contention or
by output shorting. If a significant temperature increase is detected
RO
RE
DE
DI
ADM3491
R
A
B
Z
D
Y
Figure 3.
in the internal driver circuitry during fault conditions, then the
thermal shutdown circuit forces the driver output into a high
impedance state. If the inputs are unconnected (floating), the
receiver contains a fail-safe feature that results in a logic high
output state. The parts are fully specified over the commercial
and industrial temperature ranges. The ADM3483/ADM3485/
ADM3488/ADM3490 are available in 8-lead SOIC_N; the
ADM3491 is available in a 14-lead SOIC_N.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 4
Timing Specifications—ADM3485/ADM3490/ADM3491.... 5
Timing Specifications—ADM3483/ADM3488........................ 5
Timing Specifications—ADM3483/ADM3485/ADM3488/
ADM3490/ADM3491 .................................................................. 6
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Test Circuits....................................................................................... 9
Switching Characteristics .............................................................. 11
Typical Performance Characteristics ........................................... 12
Circuit Description......................................................................... 14
Devices with Receiver/Driver Enables—
ADM3483/ADM3485/ADM3491............................................ 14
Devices Without Receiver/Driver Enables—
ADM3488/ADM3490................................................................ 14
Reduced EMI and Reflections—ADM3483/ADM3488 ....... 14
Low Power Shutdown Mode..................................................... 14
Driver Output Protection.......................................................... 14
Propagation Delay ...................................................................... 14
Typical Applications................................................................... 14
Line Length vs. Data Rate ......................................................... 15
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 18
REVISION HISTORY
10/06—Rev. A to Rev. B
Updated Format..................................................................Universal
Added ADM3491................................................................Universal
Changes to Specifications Section.................................................. 4
Changes to Typical Applications Section .................................... 14
7/06—Rev. 0 to Rev. A
Changes to Applications .................................................................. 1
Changes to General Description .................................................... 1
Changes to Figure 19...................................................................... 10
Changes to Typical Applications Section .................................... 13
Changes to Figure 31 and Figure 32............................................. 14
Updated Outline Dimensions ....................................................... 15
10/05—Revision 0: Initial Version
Rev. B | Page 2 of 20
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
Table 1. ADM34xx Part Comparison
Part No.
ADM3483
ADM3485
ADM3488
ADM3490
ADM3491
Guaranteed Data
Rate (Mbps)
0.25
10
0.25
10
10
Supply
Voltage (V)
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
Half-/Full-
Duplex
Half
Half
Full
Full
Full
Slew Rate
Limited
Yes
No
Yes
No
No
Driver/Receiver
Enable
Yes
Yes
No
No
Yes
Shutdown
Current (nA)
2
2
N/A
N/A
2
Pin
Count
8
8
8
8
14
Rev. B | Page 3 of 20
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
SPECIFICATIONS
V
CC
= 3.3 V ± 0.3 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
DRIVER
Differential Output Voltage (V
OD
)
Min
2.0
1.5
1.5
0.2
3
0.2
0.8
2.0
±2
1.0
−0.8
0.1
−0.1
Output Leakage (Y, Z) in Shutdown Mode (I
O
)
0.01
−0.01
RECEIVER
Differential Input Threshold Voltage (V
TH
)
Input Hysteresis (Δ V
TH
)
CMOS Output Voltage High (V
OH
)
CMOS Output Voltage Low (V
OL
)
Three-State Output Leakage Current (I
OZR
)
Input Resistance (R
IN
)
POWER SUPPLY CURRENT
Supply Current (I
CC
)
Supply Current in Shutdown Mode (I
SHDN
)
Driver Short-Circuit Output Current (I
OSD
)
Receiver Short-Circuit Output Current (I
OSR
)
1
Typ
Max
Unit
V
V
V
V
V
V
V
V
μA
mA
mA
μA
μA
μA
μA
Test Conditions/Comments
R
L
= 100 Ω (RS-422), V
CC
= 3.3 V ± 5% (see Figure 7)
R
L
= 54 Ω (RS-485) (see Figure 7)
R
L
= 60 Ω (RS-485), V
CC
= 3.3 V (see Figure 8)
R
L
= 54 Ω or 100 Ω (see Figure 7)
R
L
= 54 Ω or 100 Ω (see Figure 7)
R
L
= 54 Ω or 100 Ω (see Figure 7)
DE, DI, RE
DE, DI, RE
DE, DI, RE
V
IN
= 12 V, DE = 0 V, V
CC
= 0 V or 3.6 V
V
IN
= −7 V, DE = 0 V, V
CC
= 0 V or 3.6 V
V
IN
= 12 V, DE = 0 V, RE = 0 V, V
CC
= 0 V or 3.6 V,
ADM3491 only
V
IN
= −7 V, DE = 0 V, RE = 0 V, V
CC
= 0 V or 3.6 V,
ADM3491 only
V
IN
= 12 V, DE = 0 V, RE = V
CC
, V
CC
= 0 V or 3.6 V,
ADM3491 only
V
IN
= −7 V, DE = 0 V, RE = V
CC
, V
CC
= 0 V or 3.6 V,
ADM3491 only
−7 V < V
CM
< +12 V
V
CM
= 0 V
I
OUT
= −1.5 mA, V
ID
= 200 mV (see Figure 9)
I
OUT
= 2.5 mA, V
ID
= 200 mV (see Figure 9)
V
CC
= 3.6 V, 0 V ≤ V
OUT
≤ V
CC
−7 V < V
CM
< +12 V
DE = V
CC
, RE = 0 V or V
CC
, no load, DI = 0 V or V
CC
DE = 0 V, RE = 0 V, no load, DI = 0 V or V
CC
DE = 0 V, RE = V
CC
, DI = V
CC
or 0 V
V
OUT
= −7 V
V
OUT
= 12 V
0 V < V
RO
< V
CC
Δ |V
OD
| for Complementary Output States
1
Common-Mode Output Voltage (V
OC
)
Δ |V
OC
| for Common-Mode Output Voltage
1
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low (V
IH
)
CMOS Input Logic Threshold High (V
IL
)
CMOS Logic Input Current (I
IN1
)
Input Current—A, B (I
IN2
)
Output Leakage—Y, Z (I
O
)
−0.2
50
V
CC
– 0.4
+0.2
0.4
±1
12
1.1
0.95
0.002
2.2
1.9
1
−250
250
±60
V
mV
V
V
μA
kΩ
mA
mA
μA
mA
mA
mA
±8
ΔV
OD
and
ΔV
OC
are the changes in V
OD
and V
OC
, respectively, when DI input changes state.
Rev. B | Page 4 of 20
ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
TIMING SPECIFICATIONS—ADM3485/ADM3490/ADM3491
V
CC
= 3.3 V, T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter
DRIVER
Differential Output Delay (t
DD
)
Differential Output Transition Time (t
TD
)
Propagation Delay, Low-to-High Level (t
PLH
)
Propagation Delay, High-to-Low Level (t
PHL
)
|t
PLH
– t
PHL
| Propagation Delay Skew
1
(t
PDS
)
DRIVER OUTPUT ENABLE/DISABLE TIMES (ADM3485/
ADM3491 ONLY)
Output Enable Time to Low Level (t
PZL
)
Output Enable Time to High Level (t
PZH
)
Output Disable Time from High Level (t
PHZ
)
Output Disable Time from Low Level (t
PLZ
)
Output Enable Time from Shutdown to Low Level (t
PSL
)
Output Enable Time from Shutdown to High Level (t
PSH
)
1
Min
1
3
7
7
Typ
22
8
22
22
Max
35
25
35
35
8
Unit
ns
ns
ns
ns
ns
Test Conditions/Comments
R
L
= 60 Ω
(see
Figure 10 and Figure 16)
R
L
= 60 Ω
(see
Figure 10 and Figure 16)
R
L
= 27 Ω
(see
Figure 11 and Figure 17)
R
L
= 27 Ω
(see
Figure 11 and Figure 17)
R
L
= 27 Ω
(see
Figure 11 and Figure 17)
45
45
40
40
650
650
90
90
80
80
900
900
ns
ns
ns
ns
ns
ns
R
L
= 110 Ω
(see
Figure 13 and Figure 19)
R
L
= 110 Ω
(see
Figure 12 and Figure 18)
R
L
= 110 Ω
(see
Figure 12 and Figure 18)
R
L
= 110 Ω
(see
Figure 13 and Figure 19)
R
L
= 110 Ω
(see
Figure 13 and Figure 19)
R
L
= 110 Ω
(see
Figure 12 and Figure 18)
Measured on |t
PLH
(Y) − t
PHL
(Y)| and |t
PLH
(Z) − t
PHL
(Z)|.
TIMING SPECIFICATIONS—ADM3483/ADM3488
V
CC
= 3.3 V, T
A
= 25°C, unless otherwise noted.
Table 4.
Parameter
DRIVER
Differential Output Delay (t
DD
)
Differential Output Transition Time (t
TD
)
Propagation Delay, Low-to-High Level (t
PLH
)
Propagation Delay, High-to-Low Level (t
PHL
)
|t
PLH
– t
PHL
| Propagation Delay Skew
1
(t
PDS
)
DRIVER OUTPUT ENABLE/DISABLE TIMES (ADM3483 ONLY)
Output Enable Time to Low Level (t
PZL
)
Output Enable Time to High Level (t
PZH
)
Output Disable Time from High Level (t
PHZ
)
Output Disable Time from Low Level (t
PLZ
)
Output Enable Time from Shutdown to Low Level (t
PSL
)
Output Enable Time from Shutdown to High Level (t
PSH
)
1
Min
600
400
700
700
Typ
900
700
1000
1000
100
900
600
50
50
1.9
2.2
Max
1400
1200
1500
1500
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
Test Conditions/Comments
R
L
= 60 Ω
(see
Figure 10 and Figure 16)
R
L
= 60 Ω
(see
Figure 10 and Figure 16)
R
L
= 27 Ω
(see
Figure 11 and Figure 17)
R
L
= 27 Ω
(see
Figure 11 and Figure 17)
R
L
= 27 Ω
(see
Figure 11 and Figure 17)
R
L
= 110 Ω
(see
Figure 13 and Figure 19)
R
L
= 110 Ω
(see
Figure 12 and Figure 18)
R
L
= 110 Ω
(see
Figure 12 and Figure 18)
R
L
= 110 Ω
(see
Figure 13 and Figure 19)
R
L
= 110 Ω
(see
Figure 13 and Figure 19)
R
L
= 110 Ω
(see
Figure 12 and Figure 18)
1300
800
80
80
2.7
3.0
Measured on |t
PLH
(Y) − t
PHL
(Y)| and |t
PLH
(Z) − t
PHL
(Z)|.
Rev. B | Page 5 of 20
