Changes to Ordering Guide ...........................................................21
1/12—Rev. C to Rev. D
Changes to Ordering Guide .......................................................... 21
1/11—Rev. B to Rev. C
Changes to Figure 15 and Figure 16................................................9
11/10—Rev. A to Rev. B
Changes to Theory of Operation.................................................. 13
Changes to Ordering Guide .......................................................... 20
8/10—Rev. 0 to Rev. A
Added ADP162/ADP163 ............................................. Throughout
Changes to Figure 17 and Figure 18................................................9
Changes to Figure 19, Figure 20, and Figure 23 ......................... 10
Added Figure 21 and Figure 22 (Renumbered Sequentially) ... 10
Added Figure 32 and Figure 33 .................................................... 12
Changes to Ordering Guide .......................................................... 20
6/10—Revision 0: Initial Version
Rev. H | Page 2 of 24
Data Sheet
SPECIFICATIONS
ADP160/ADP161/ADP162/ADP163
V
IN
= (V
OUT
+ 0.5 V) or 2.2 V, whichever is greater; EN = V
IN
, I
OUT
= 10 mA, C
IN
= C
OUT
= 1 μF, T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Symbol
V
IN
I
GND
Conditions
T
J
= −40°C to +125°C
I
OUT
= 0 μA
I
OUT
= 0 μA, T
J
= −40°C to +125°C
I
OUT
= 1 μA
I
OUT
= 1 μA, T
J
= −40°C to +125°C
I
OUT
= 100 μA
I
OUT
= 100 μA, T
J
= −40°C to +125°C
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 150 mA
I
OUT
= 150 mA, T
J
= −40°C to +125°C
EN = GND
EN = GND, T
J
= −40°C to +125°C
I
OUT
= 10 mA
0 μA < I
OUT
< 150 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
0 μA < I
OUT
< 150 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V,
T
J
= −40°C to +125°C
I
OUT
= 10 mA
0 μA < I
OUT
< 150 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V
0 μA < I
OUT
< 150 mA, V
IN
= (V
OUT
+ 0.5 V) to 5.5 V,
T
J
= −40°C to +125°C
REGULATION
Line Regulation
Load Regulation
2
DROPOUT VOLTAGE
4-Ball WLCSP
3
Min
2.2
Typ
560
860
2.6
11
Max
5.5
1250
2.3
1800
2.8
4.5
5.8
19
42
65
50
1
−1
−2
−3.5
0.99
0.98
0.97
1.0
+1
+2
+3.5
1.01
1.02
1.03
SHUTDOWN CURRENT
OUTPUT VOLTAGE ACCURACY
I
GND-SD
Unit
V
nA
μA
nA
μA
μA
μA
μA
μA
μA
μA
nA
μA
%
%
%
V
V
V
V
OUT
ADJUSTABLE-OUTPUT VOLTAGE
ACCURACY (ADP161/ADP163)
1
V
ADJ
∆V
OUT
/∆V
IN
∆V
OUT
/∆I
OUT
V
DROPOUT
5-Lead TSOT
ADJ INPUT BIAS CURRENT (ADP161/ADP163)
ACTIVE PULL-DOWN RESISTANCE
(ADP160/ADP161)
START-UP TIME
4
CURRENT LIMIT THRESHOLD
5
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
EN INPUT
En Input Logic High
EN Input Logic Low
EN Input Leakage Current
ADJ
I-BIAS
T
SHUTDOWN
T
START-UP
I
LIMIT
TS
SD
TS
SD-HYS
V
IH
V
IL
V
I-LEAKAGE
V
IN
= (V
OUT
+ 0.5 V) to 5.5 V, T
J
= −40°C to +125°C
I
OUT
= 100 μA to 150 mA
I
OUT
= 100 μA to 150 mA, T
J
= −40°C to +125°C
V
OUT
= 3.3 V
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 150 mA
I
OUT
= 150 mA, T
J
= −40°C to +125°C
I
OUT
= 10 mA
I
OUT
= 10 mA, T
J
= −40°C to +125°C
I
OUT
= 150 mA
I
OUT
= 150 mA, T
J
= −40°C to +125°C
2.2 V ≤ V
IN
≤ 5.5 V, ADJ connected to VOUT
V
OUT
= 2.8 V, R
LOAD
= ∞
V
OUT
= 3.3 V
−0.1
0.004
+0.1
0.01
7
13
105
195
8
15
120
225
10
300
1100
320
150
15
600
%/V
%/mA
%/mA
mV
mV
mV
mV
mV
mV
mV
mV
nA
Ω
μs
mA
°C
°C
V
V
μA
μA
220
T
J
rising
500
2.2 V ≤ V
IN
≤ 5.5 V
2.2 V ≤ V
IN
≤ 5.5 V
EN = V
IN
or GND
EN = V
IN
or GND, T
J
= −40°C to +125°C
Rev. H | Page 3 of 24
1.2
0.4
0.1
1
ADP160/ADP161/ADP162/ADP163
Parameter
UNDERVOLTAGE LOCKOUT
Input Voltage Rising
Input Voltage Falling
Hysteresis
OUTPUT NOISE
Symbol
UVLO
UVLO
RISE
UVLO
FALL
UVLO
HYS
OUT
NOISE
Conditions
Min
Typ
Data Sheet
Max
2.19
1.60
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 3.3 V
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 2.5 V
10 Hz to 100 kHz, V
IN
= 5 V, V
OUT
= 1.2 V
100
105
100
80
60
65
72
50
50
62
Unit
V
V
mV
µV
rms
µV
rms
µV
rms
dB
dB
dB
dB
dB
dB
POWER SUPPLY REJECTION RATIO
PSRR
100 Hz, V
IN
= 5 V, V
OUT
= 3.3 V
100 Hz, V
IN
= 5 V, V
OUT
= 2.5 V
100 Hz, V
IN
= 5 V, V
OUT
= 1.2 V
1 kHz, V
IN
= 5 V, V
OUT
= 3.3 V
1 kHz, V
IN
= 5 V, V
OUT
= 2.5 V
1 kHz, V
IN
= 5 V, V
OUT
= 1.2 V
Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the
tolerances of resistors used.
2
Based on an end-point calculation using 0 μA and 150 mA loads.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.2 V.
4
Start-up time is defined as the time between the rising edge of EN to V
OUT
being at 90% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V.
1
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE
1
CAPACITOR ESR
1
Symbol
C
MIN
R
ESR
Conditions
T
A
= −40°C to +125°C
T
A
= −40°C to +125°C
Min
0.7
0.001
Typ
Max
0.2
Unit
µF
Ω
The minimum input and output capacitance should be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
however, Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. H | Page 4 of 24
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
ADJ to GND
NC to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−0.3 V to VIN
−65°C to +150°C
−40°C to +125°C
−40°C to +125°C
JEDEC J-STD-020
ADP160/ADP161/ADP162/ADP163
Junction-to-ambient thermal resistance (θ
JA
) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on the
application and board layout. In applications where high maximum
power dissipation exists, close attention to thermal board design
is required. The value of θ
JA
may vary, depending on PCB material,
layout, and environmental conditions. The specified values of
θ
JA
are based on a 4-layer, 4 inches × 3 inches, circuit board. Refer
to JESD 51-7 and JESD 51-9 for detailed information on the
board construction. For additional information, see the
AN-617
Application Note,
MicroCSP™ Wafer Level Chip Scale Package.
Ψ
JB
is the junction to board thermal characterization parameter
with units of °C/W. Ψ
JB
of the package is based on modeling and
calculation using a 4-layer board. The JESD51-12,
Guidelines for
Reporting and Using Electronic Package Thermal Information,
states that thermal characterization parameters are not the same
as thermal resistances. Ψ
JB
measures the component power flowing
through multiple thermal paths rather than a single path as in
thermal resistance, θ
JB
. Therefore, Ψ
JB
thermal paths include
convection from the top of the package as well as radiation from
the package, factors that make Ψ
JB
more useful in real-world
applications. Maximum junction temperature (T
J
) is calculated
from the board temperature (T
B
) and power dissipation (P
D
)
using the formula
T
J
=
T
B
+ (P
D
× Ψ
JB
)
Refer to JESD51-8 and JESD51-12 for more detailed information
about Ψ
JB
.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings only apply individually; they do not
apply in combination. The
ADP16x
can be damaged when the
junction temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that T
J
is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T
J
) of
the device is dependent on the ambient temperature (T
A
), the
power dissipation of the device (P
D
), and the junction-to-ambient
thermal resistance of the package (θ
JA
).
Maximum junction temperature (T
J
) is calculated from the ambient
temperature (T
A
) and power dissipation (P
D
) using the formula
T
J
=
T
A
+ (P
D
×
θ
JA
)
THERMAL RESISTANCE
θ
JA
and Ψ
JB
are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
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