Compact, 800 mA, 3 MHz,
Step-Down DC-to-DC Converter
Data Sheet
FEATURES
Input voltage: 2.3 V to 5.5 V
Peak efficiency: 95%
3 MHz fixed frequency operation
Typical quiescent current: 24 μA
Very small solution size
6-lead, 1 mm × 1.5 mm WLCSP package
Fast load and line transient response
100% duty cycle low dropout mode
Internal synchronous rectifier, compensation, and soft start
Current overload and thermal shutdown protections
Ultralow shutdown current: 0.2 μA (typical)
Forced PWM and automatic PWM/PSM modes
Supported by
ADIsimPower™
design tool
ADP2138/ADP2139
GENERAL DESCRIPTION
The ADP2138 and ADP2139 are high efficiency, low quiescent
current, synchronous step-down dc-to-dc converters. The
ADP2139 has the additional feature of an internal discharge
switch. The total solution requires only three tiny external
components. When the MODE pin is set high, the buck
regulator operates in forced PWM mode, which provides low
peak-to-peak ripple for power supply noise sensitive loads at
the expense of light load efficiency. When the MODE pin is set
low, the buck regulator automatically switches operating modes,
depending on the load current level. At higher output loads, the
buck regulator operates in PWM mode. When the load current
falls below a predefined threshold, the regulator operates in power
save mode (PSM), improving light load efficiency.
The ADP2138/ADP2139 operate on input voltages of 2.3 V to
5.5 V, which allows for single lithium or lithium polymer cell,
multiple alkaline or NiMH cell, PCMCIA, USB, and other
standard power sources. The maximum load current of 800 mA
is achievable across the input voltage range.
The ADP2138/ADP2139 are available in fixed output voltages of
3.3 V, 3.0 V, 2.8 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, and 0.8 V. All
versions include an internal power switch and synchronous rect-
ifier for minimal external part count and high efficiency. The
ADP2138/ADP2139 have internal soft start and they are internally
compensated. During logic controlled shutdown, the input is
disconnected from the output and the ADP2138/ADP2139
draw 0.2 μA (typical) from the input source.
Other key features include undervoltage lockout to prevent deep
battery discharge, and soft start to prevent input current over-
shoot at startup. The ADP2138/ADP2139 are available in a 6-ball
wafer level chip scale package (WLCSP).
APPLICATIONS
PDAs and palmtop computers
Wireless handsets
Digital audio, portable media players
Digital cameras, GPS navigation units
TYPICAL APPLICATIONS CIRCUIT
2.3V TO 5.5V
VIN
4.7µF
SW
4.7µF
1.0µH
V
OUT
ADP2138/
ADP2139
EN
VOUT
ON
OFF
FORCE
PWM
AUTO
MODE
GND
09496-001
Figure 1.
Rev. C
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ADP2138/ADP2139
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Typical Applications Circuit............................................................ 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Input and Output Capacitor, Recommended Specifications .. 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 11
Control Scheme .......................................................................... 11
PWM Mode ................................................................................. 11
Power Save Mode ........................................................................ 11
Enable/Shutdown ....................................................................... 11
Data Sheet
Short-Circuit Protection............................................................ 12
Undervoltage Lockout ............................................................... 12
Thermal Protection .................................................................... 12
Soft Start ...................................................................................... 12
Current Limit .............................................................................. 12
100% Duty Operation ................................................................ 12
Discharge Switch ........................................................................ 12
Applications Information .............................................................. 13
ADIsimPower Design Tool ....................................................... 13
External Component Selection ................................................ 13
Thermal Considerations............................................................ 14
PCB Layout Guidelines.............................................................. 14
Evaluation Board ............................................................................ 15
Evaluation Board Layout ........................................................... 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
REVISION HISTORY
1/13—Rev. B to Rev. C
Change to Figure 18, Caption ........................................................ 8
Change to Figure 28, Caption ....................................................... 10
6/12—Rev. A to Rev. B
Change to Features Section ............................................................. 1
Added ADIsimPower Design Tool Section ................................. 13
Changes to Ordering Guide .......................................................... 17
4/11—Rev. 0 to Rev. A
Change to Features Section ............................................................. 1
Added Figure 32, Renumbered Figures Sequentially ................ 10
Changes to Ordering Guide .......................................................... 16
1/11—Revision 0: Initial Version
Rev. C | Page 2 of 20
Data Sheet
SPECIFICATIONS
ADP2138/ADP2139
V
IN
= 3.6 V, V
OUT
= 0.8 V − 3.3 V, T
J
= −40°C to +125°C for minimum/maximum specifications, and T
A
= 25°C for typical specifications,
unless otherwise noted. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
Table 1.
Parameter
INPUT CHARACTERISTICS
Input Voltage Range
Undervoltage Lockout Threshold
OUTPUT CHARACTERISTICS
Output Voltage Accuracy
Line Regulation
Load Regulation
PWM TO POWER SAVE MODE CURRENT THRESHOLD
INPUT CURRENT CHARACTERISTICS
DC Operating Current
Shutdown Current
SW CHARACTERISTICS
SW On Resistance
Current Limit
Discharge Switch (ADP2139)
ENABLE AND MODE CHARACTERISTICS
Input High Threshold
Input Low Threshold
Input Leakage Current
OSCILLATOR FREQUENCY
START-UP TIME
THERMAL CHARACTERISTICS
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
I
LOAD
= 0 mA, device not switching
EN = 0 V, T
A
= T
J
= −40°C to +85°C
PFET
NFET
PFET switch peak current limit
Test Conditions/Comments
Min
2.3
V
IN
rising
V
IN
falling
PWM mode
V
IN
= 2.3 V to 5.5 V, PWM mode
I
LOAD
= 0 mA − 800 mA
2.00
−2
0.25
−0.95
100
23
0.2
155
115
1500
100
30
1.0
240
200
1650
2.15
Typ
Max
5.5
2.3
2.25
+2
Unit
V
V
V
%
%/V
%/A
mA
μA
μA
mΩ
mΩ
mA
Ω
V
V
μA
MHz
μs
°C
°C
1100
1.2
EN/MODE = 0 V (min), 3.6 V (max )
−1
2.6
0
3.0
250
150
20
0.4
+1
3.4
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
T
A
= −40°C to +125°C, unless otherwise specified. All limits at temperature extremes are guaranteed via correlation using standard
statistical quality control (SQC).
Table 2.
Parameter
MINIMUM INPUT AND OUTPUT CAPACITANCE
CAPACITOR ESR
Symbol
C
MIN
R
ESR
Min
4.7
0.001
Typ
Max
1
Unit
µF
Ω
Rev. C | Page 3 of 20
ADP2138/ADP2139
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN, EN, MODE
VOUT, SW to GND
Temperature Range
Operating Ambient
Operating Junction
Storage Temperature
Lead Temperature Range
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
ESD Model
Human Body
Charged Device
Machine
Rating
−0.4 V to +6.5 V
−1.0 V to (V
IN
+ 0.2 V)
−40°C to +85°C
−40°C to +125°C
−65°C to +150°C
−65°C to +150°C
300°C
215°C
220°C
±1500 V
±500 V
±100 V
Data Sheet
Junction-to-ambient thermal resistance (θ
JA
) of the package is
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
JA
may vary, depending on
PCB material, layout, and environmental conditions. The specified
values of θ
JA
are based on a 4-layer, 4 in. × 3 in., circuit board. Refer
to JEDEC JESD 51-9 for detailed information pertaining to board
construction. For additional information, see
AN-617 Application
Note,
MicroCSP
TM
Wafer Level Chip Scale Package.
Ψ
JB
is the junction-to-board thermal characterization parameter
measured in units of °C/W. Ψ
JB
of the package is based on modeling
and calculation using a 4-layer board. The JESD51-12,
Guidelines
for Reporting and Using Package Thermal Information,
states that
thermal characterization parameters are not the same as thermal
resistances. Ψ
JB
measures the component power flowing through
multiple thermal paths rather than through a single path, which
is the procedure for measuring thermal resistance, θ
JB
. There-
fore, Ψ
JB
thermal paths include convection from the top of the
package as well as radiation from the package; factors that make
Ψ
JB
more useful in real-world applications than θ
JB
. Maximum
junction temperature (T
J
) is calculated from the board temperature
(T
B
) and power dissipation (P
D
) using the formula
T
J
=
T
B
+ (P
D
×
Ψ
JB
)
Refer to JEDEC JESD51-8 and JESD51-12 for more detailed
information about Ψ
JB
.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination.
ADP2138/ADP2139 can be damaged when the junction tempera-
ture limits are exceeded. Monitoring ambient temperature does
not guarantee that the junction temperature (T
J
) is within the
specified temperature limits. In applications with high power
dissipation and poor thermal resistance, the maximum ambient
temperature may need to be derated. In applications with mod-
erate power dissipation and low printed circuit board (PCB)
thermal resistance, the maximum ambient temperature can
exceed the maximum limit for as long as the junction temperature
is within specification limits. The junction temperature (T
J
) of
the device is dependent on the ambient temperature (T
A
), the
power dissipation of the device (P
D
), and the junction-to-ambient
thermal resistance of the package (θ
JA
). Maximum junction
temperature (T
J
) is calculated from the ambient temperature
(T
A
) and power dissipation (P
D
) using the formula
T
J
=
T
A
+ (P
D
×
θ
JA
)
THERMAL RESISTANCE
θ
JA
and Ψ
JB
are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
6-Ball WLCSP
θ
JA
170
Ψ
JB
80
Unit
°C/W
ESD CAUTION
Rev. C | Page 4 of 20
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VIN
1
SW
2
EN
4
MODE
5
ADP2138/ADP2139
GND VOUT
3
6
Figure 2. Pin Configuration (Top View)
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
Mnemonic
VIN
SW
GND
EN
MODE
VOUT
Description
Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 4.7 μF or greater
capacitor as close to the ADP2138/ADP2139 as possible.
Switch Node Output. SW is the drain of the P-channel MOSFET switch and N-channel synchronous rectifier.
Connect the output LC filter between SW and the output voltage.
Ground. Connect the input and output capacitors to GND.
Buck Activation. To turn on the buck, set EN to high. To turn off the buck, set EN to low.
Mode Input. Drive the MODE pin high for the operating mode to force continuous PWM switching. Drive the MODE
pin low to allow automatic PWM/PSM operating mode.
Output Voltage Sensing Input.
Rev. C | Page 5 of 20
09496-002
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
电源技术
