®
®
ADS-929
14-Bit, 2MHz, Low-Power
Sampling A/D Converters
FEATURES
•
•
•
•
•
•
•
•
•
14-bit resolution
2MHz sampling rate
No missing codes
Functionally complete
Small 24-pin DDIP or SMT package
Low power, 1.7 Watts
Operates from ±15V or ±12V supplies
Edge-triggered; No pipeline delays
Bipolar ±5V input range
GENERAL DESCRIPTION
The ADS-929 is a high-performance, 14-bit, 2MHz sampling
A/D converter. This device samples input signals up to Nyquist
frequencies with no missing codes. The ADS-929 features
outstanding dynamic performance including a THD of –79dB.
Housed in a small 24-pin DDIP or SMT (gull-wing) package,
the functionally complete ADS-929 contains a fast-settling
sample-hold amplifier, a subranging (two-pass) A/D converter,
a precise voltage reference, timing/control logic, and error-
correction circuitry. Digital input and output levels are TTL.
Requiring ±15V (or ±12V) and +5V supplies, the ADS-929
typically dissipates 1.7W (1.4W for ±12V). The unit is offered
with a bipolar input (–5V to +5V). Models are available for use
in either commercial (0 to +70°C) or military (–55 to +125°C)
operating temperature ranges. Applications include radar,
sonar, spectrum analysis, and graphic/medical imaging.
PIN
1
2
3
4
5
6
7
8
9
10
11
12
INPUT/OUTPUT CONNECTIONS
FUNCTION
BIT 14 (LSB)
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
PIN
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
–12V/–15V SUPPLY
ANALOG GROUND
+12V/+15V SUPPLY
+10V REFERENCE OUT
ANALOG INPUT
ANALOG GROUND
BIT 1 (MSB)
BIT 2
START CONVERT
EOC
DIGITAL GROUND
+5V SUPPLY
DAC
18 BIT 1 (MSB)
17 BIT 2
+10V REF. OUT 21
S
2
FLASH
ADC
S/H
ANALOG INPUT 20
–
REGISTER
+
S
1
BUFFER
REGISTER
REF
DIGITAL CORRECTION LOGIC
12 BIT 3
11 BIT 4
10 BIT 5
9
8
7
6
5
4
3
2
1
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
START CONVERT 16
TIMING AND
CONTROL LOGIC
EOC 15
13
+5V SUPPLY
14
DIGITAL GROUND
22
+12V/+15V SUPPLY
19, 23
ANALOG GROUND
24
–12V/–15V SUPPLY
Figure 1. ADS-929 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)
•
Tel: (508) 339-3000 Fax: (508) 339-6356
•
For immediate assistance: (800) 233-2765
®
®
ADS-929
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+12V/+15V Supply
(Pin 22)
–12V/–15V Supply
(pin 24)
+5V Supply
(Pin 13)
Digital Input
(Pin 16)
Analog Input
(Pin 20)
Lead Temperature
(10 seconds)
LIMITS
0 to +16
0 to –16
0 to +6
–0.3 to +V
DD
+0.3
±15
+300
UNITS
Volts
Volts
Volts
Volts
Volts
°C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
Operating Temp. Range, Case
ADS-929MC, GC
ADS-929MM, GM, 883
Thermal Impedance
θjc
θca
Storage Temperature
Package Type
Weight
MIN.
0
–55
TYP.
—
—
MAX.
+70
+125
UNITS
°C
°C
6
°C/Watt
24
°C/Watt
–65
—
+150
°C
24-pin, metal-sealed, ceramic DDIP or SMT
0.42 ounces (12 grams)
FUNCTIONAL SPECIFICATIONS
(T
A
= +25°C, ±V
CC
= ±15V (or ±12V), +V
DD
= +5V, 2MHz sampling rate, and a minimum 1 minute warmup
unless otherwise specified.)
+25°C
ANALOG INPUT
Input Voltage Range
Input Resistance
Input Capacitance
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
(f
in
= 10kHz)
Differential Nonlinearity
(f
in
= 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error
(Tech Note 2)
Bipolar Offset Error
(Tech Note 2)
Gain Error
(Tech Note 2)
No Missing Codes
(f
in
= 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics
(–0.5dB)
dc to 500kHz
500kHz to 1MHz
Total Harmonic Distortion
(–0.5dB)
dc to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
Signal-to-Noise Ratio
(& distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
Two-Tone Intermodulation
Distortion
(f
in
= 200kHz,
500kHz, f
s
= 2MHz, –0.5dB)
Noise
Input Bandwidth
(–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Feedthrough Rejection
(f
in
= 1MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
S/H Acquisition Time
(to ±0.003%FSR, 10V step)
Overvoltage Recovery Time
A/D Conversion Rate
—
—
—
—
76
75
72
70
—
—
—
—
—
—
—
—
150
—
2
–80
–80
–79
–79
78
77
75
75
–83
300
9
8
82
±200
±20
5
190
400
—
–75
–74
–74
–74
—
—
—
—
—
—
—
—
—
—
—
—
230
500
—
—
—
—
—
76
75
72
70
—
—
—
—
—
—
—
—
150
—
2
–80
–80
–79
–79
78
77
75
75
–82
450
9
8
82
±200
±20
5
190
400
—
–75
–74
–74
–74
—
—
—
—
—
—
—
—
—
—
—
—
230
500
—
—
—
—
—
75
74
71
67
—
—
—
—
—
—
—
—
150
—
2
–79
–74
–77
–72
77
76
74
73
–80
600
9
8
82
±200
±20
5
190
400
—
–74
–67
–72
–67
—
—
—
—
—
—
—
—
—
—
—
—
230
500
—
dB
dB
dB
dB
dB
dB
dB
dB
dB
µVrms
MHz
MHz
dB
V/µs
ns
ps rms
ns
ns
MHz
—
—
—
—
—
—
—
14
14
±0.5
±0.5
±0.05
±0.05
±0.05
±0.1
—
—
—
±0.95
±0.15
±0.15
±0.15
±0.3
—
—
—
—
—
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.15
±0.3
—
—
—
±0.95
±0.4
±0.25
±0.4
±0.5
—
—
—
—
—
—
—
—
14
14
±1
±0.5
±0.3
±0.4
±0.4
±0.5
—
—
—
±0.99
±0.5
±0.75
±0.95
±1.25
—
Bits
LSB
LSB
%FSR
%FSR
%FSR
%
Bits
+2.0
—
—
—
20
—
—
—
—
200
—
+0.8
+20
–20
—
+2.0
—
—
—
20
—
—
—
—
200
—
+0.8
+20
–20
—
+2.0
—
—
—
20
—
—
—
—
200
—
+0.8
+20
–20
—
Volts
Volts
µA
µA
ns
MIN.
—
—
—
TYP.
±5
1
7
MAX.
—
—
15
MIN.
—
—
—
0 to +70°C
TYP.
±5
1
7
MAX.
—
—
15
MIN.
—
—
—
–55 to +125°C
TYP.
±5
1
7
MAX.
—
—
15
UNITS
Volts
kΩ
pF
2
®
®
ADS-929
+25°C
ANALOG OUTPUT
Internal Reference
Voltage
Drift
External Current
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Delay, Falling Edge of EOC
to Output Data Valid
Output Coding
POWER REQUIREMENTS, ±15V
Power Supply Ranges
+15V Supply
–15V Supply
+5V Supply
Power Supply Currents
+15V Supply
–15V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
POWER REQUIREMENTS, ±12V
Power Supply Ranges
+12V Supply
–12V Supply
+5V Supply
Power Supply Currents
+12V Supply
–12V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
+11.5
–11.5
+4.75
—
—
—
—
—
+12.0
–12.0
+5.0
+45
–43
+80
1.4
—
+12.5
–12.5
+5.25
+55
–50
+90
1.6
±0.01
+11.5
–11.5
+4.75
—
—
—
—
—
+12.0
–12.0
+5.0
+45
–43
+80
1.4
—
+12.5
–12.5
+5.25
+55
–50
+90
1.6
±0.01
+11.5
–11.5
+4.75
—
—
—
—
—
+12.0
–12.0
+5.0
+45
–43
+80
1.4
—
+12.5
–12.5
+5.25
+55
–50
+90
1.6
±0.01
Volts
Volts
Volts
mA
mA
mA
Watts
%FSR/%V
+14.5
–14.5
+4.75
—
—
—
—
—
+15.0
–15.0
+5.0
+45
–43
+80
1.7
—
+15.5
–15.5
+5.25
+55
–50
+90
1.9
±0.01
+14.5
–14.5
+4.75
—
—
—
—
—
+15.0
–15.0
+5.0
+45
–43
+80
1.7
—
+15.5
–15.5
+5.25
+55
–50
+90
1.9
±0.01
+14.5
–14.5
+4.75
—
—
—
—
—
+15.0
–15.0
+5.0
+45
–43
+80
1.7
—
+15.5
–15.5
+5.25
+55
–50
+90
1.9
±0.01
Volts
Volts
Volts
mA
mA
mA
Watts
%FSR/%V
+2.4
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
35
+2.4
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
35
Offset Binary
+2.4
—
—
—
—
—
—
—
—
—
—
+0.4
–4
+4
35
Volts
Volts
mA
mA
ns
MIN.
+9.95
—
—
TYP.
+10.0
±5
—
MAX.
+10.05
—
1.5
MIN.
+9.95
—
—
0 to +70°C
TYP.
+10.0
±5
—
MAX.
+10.05
—
1.5
MIN.
+9.95
—
—
–55 to +125°C
TYP.
+10.0
±5
—
MAX.
+10.05
—
1.5
UNITS
Volts
ppm/°C
mA
Footnotes:
All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time. There is a slight
degradation in performance when using ±12V supplies.
See Ordering Information for 0 to +10V input range. Contact DATEL for availability
of other input voltage ranges.
A 2MHz clock with a 200ns wide start convert pulse is used for all production
testing. See Timing Diagram for more details.
Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
This is the time required before the A/D output data is valid after the analog input
is back within the specified range.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-929
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For
optimal performance, tie all ground pins (14, 19 and 23)
directly to a large
analog
ground plane beneath the
package.
Bypass all power supplies, as well as the REFERENCE
OUTPUT (pin 21), to ground with 4.7µF tantalum capaci-
tors in parallel with 0.1µF ceramic capacitors. Locate the
bypass capacitors as close to the unit as possible. If the
user-installed offset and gain adjusting circuit shown in
Figure 2 is used, also locate it as close to the ADS-929 as
possible.
2. The ADS-929 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the input circuit of Figure 2. When using this circuit, or any
similar offset and gain-calibration hardware, make adjust-
ments following warmup. To avoid interaction, always adjust
offset before gain.
3. When operating the ADS-929 from ±12V supplies, do not
drive external circuitry with the REFERENCE OUTPUT. The
reference's accuracy and drift specifications may not be
met, and loading the circuit may cause accuracy errors
within the converter.
4. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") initiates a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
3
®
®
ADS-929
CALIBRATION PROCEDURE
(Refer to Figures 2 and 3)
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuit of Figure 2 are guaranteed to
compensate for the ADS-929's initial accuracy errors and may
not be able to compensate for additional system errors.
All fixed resistors in Figure 2 should be metal-film types, and
multiturn potentiometers should have TCR’s of 100ppm/°C or
less to minimize drift with temperature.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.
For the ADS-929, offset adjusting is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+½ LSB (+305µV).
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1½ LSB's
(+4.999085V).
+15V
ZERO/
OFFSET
ADJUST
20k
Ω
200k
Ω
2k
Ω
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 16) so the converter is continuously converting. If using
LED's on the outputs, a 200kHz conversion rate will reduce
flicker.
2. Apply +305µV to the ANALOG INPUT (pin 20).
3. Adjust the offset potentiometer until the output bits are
a 1 and all 0's and the LSB flickers between 0 and 1.
Gain Adjust Procedure
1. Apply +4.999085V to the ANALOG INPUT (pin 20).
2. Adjust the gain potentiometer until the output bits are all 1's
and the LSB flickers between 1 and 0.
Table 1. Zero and Gain Adjust
INPUT VOLTAGE
RANGE
±5V
ZERO ADJUST
+½ LSB
+305µV
GAIN ADJUST
+FS –1½ LSB
+4.999085V
Table 2. Output Coding
OUTPUT CODING
MSB
LSB
11 1111 1111 1111
11 1000 0000 0000
11 0000 0000 0000
10 0000 0000 0000
01 0000 0000 0000
00 1000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
INPUT RANGE
±5V
+4.99939
+3.75000
+2.50000
0.00000
–2.50000
–3.75000
–4.99939
–5.00000
BIPOLAR
SCALE
+FS –1 LSB
+3/4 FS
+1/2FS
0
–1/2FS
–3/4FS
–FS +1 LSB
–FS
–15V
SIGNAL
INPUT
GAIN
ADJUST
+15V
1.98k
Ω
50
Ω
To Pin 20
of ADS-929
Coding is offset binary; 1LSB = 610µV.
–15V
Figure 2. ADS-929 Calibration Circuit
18 BIT 1 (MSB)
+5V
4.7µF
+
0.1µF
14
DIGITAL
GROUND
13
17 BIT 2
12 BIT 3
11 BIT 4
10 BIT 5
9 BIT 6
8 BIT 7
7 BIT 8
6 BIT 9
5 BIT 10
4 BIT 11
3 BIT 12
2 BIT 13
1 BIT 14 (LSB)
15 EOC
START
16
CONVERT
–12V/–15V
4.7µF
+
4.7µF
+
+12V/+15V
–5V to +5V
0.1µF
24
ADS-929
ANALOG
19, 23 GROUND
0.1µF
22
ANALOG
20 INPUT
21 +10V REF. OUT
0.1µF
+
4.7µF
Figure 3. Typical ADS-929 Connection Diagram
4
®
®
ADS-929
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of
0 to +70°C and –55 to +125°C. All room-temperature
(T
A
= +25°C) production testing is performed without the use of
heat sinks or forced-air cooling. Thermal impedance figures for
each device are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
N
START
CONVERT
200ns
typ.
10ns typ.
Hold
310ns typ.
N+1
Acquisition Time
190ns
±40ns
70ns ±10ns
INTERNAL S/H
30ns typ.
EOC
Conversion Time
360ns ±20ns
35ns max.
75ns max.
OUTPUT
DATA
Data (N – 1) Valid
Data N Valid
425ns min.
Invalid
Data
Notes: 1. f
s
= 2MHz.
2. The ADS-929 is an edge-triggered device. All internal operations
are triggered by the rising edge of the start convert pulse, which
may be as narrow as 20nsec. All production testing is performed
at a 2MHz sampling rate with 200nsec wide start pulses. For
lower sampling rates, wider start pulses may be used, however, a
minimum pulse width low of 20nsec must be maintained.
Figure 4. ADS-929 Timing Diagram
5
FPGA/CPLD
