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a
MicroConverter
®
, Multichannel
12-Bit ADC with Embedded Flash MCU
ADuC812
APPLICATIONS
Intelligent Sensors Calibration and Conditioning
Battery-Powered Systems (Portable PCs, Instruments,
Monitors)
Transient Capture Systems
DAS and Communications Systems
Control Loop Monitors (Optical Networks/Base Stations)
GENERAL DESCRIPTION
FEATURES
Analog I/O
8-Channel, High Accuracy 12-Bit ADC
On-Chip, 100 ppm/ C Voltage Reference
High Speed 200 kSPS
DMA Controller for High Speed ADC-to-RAM Capture
2 12-Bit Voltage Output DACs
On-Chip Temperature Sensor Function
Memory
8K Bytes On-Chip Flash/EE Program Memory
640 Bytes On-Chip Flash/EE Data Memory
256 Bytes On-Chip Data RAM
16M Bytes External Data Address Space
64K Bytes External Program Address Space
8051 Compatible Core
12 MHz Nominal Operation (16 MHz Max)
3 16-Bit Timer/Counters
High Current Drive Capability—Port 3
9 Interrupt Sources, 2 Priority Levels
Power
Specified for 3 V and 5 V Operation
Normal, Idle, and Power-Down Modes
On-Chip Peripherals
UART and SPI
®
Serial I/O
2-Wire (400 kHz I
2
C
®
Compatible) Serial I/O
Watchdog Timer
Power Supply Monitor
The ADuC812 is a fully integrated 12-bit data acquisition system
incorporating a high performance self-calibrating multichannel
ADC, dual DAC, and programmable 8-bit MCU (8051 instruc-
tion set compatible) on a single chip.
The programmable 8051 compatible core is supported by 8K
bytes Flash/EE program memory, 640 bytes Flash/EE data
memory, and 256 bytes data SRAM on-chip.
Additional MCU support functions include Watchdog Timer,
Power Supply Monitor, and ADC DMA functions. Thirty-two
programmable I/O lines, I
2
C compatible SPI and Standard
UART Serial Port I/O are provided for multiprocessor interfaces
and I/O expansion.
Normal, idle, and power-down operating modes for both the
MCU core and analog converters allow flexible power manage-
ment schemes suited to low power applications. The part is
specified for 3 V and 5 V operation over the industrial tem-
perature range and is available in a 52-lead, plastic quad
flatpack package, and in a 56-lead, chip scale package.
FUNCTIONAL BLOCK DIAGRAM
P0.0–P0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
AIN0 (P1.0)–AIN7 (P1.7)
AIN
MUX
T/H
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
ADC
CONTROL
AND
CALIBRATION
LOGIC
DAC0
DAC
CONTROL
DAC1
BUF
DAC0
BUF
DAC1
T0 (P3.4)
MICROCONTROLLER
2.5V
REF
TEMP
SENSOR
8051 BASED
MICROCONTROLLER CORE
8K 8 PROGRAM
FLASH EEPROM
640 8 USER
FLASH EEPROM
POWER SUPPLY
MONITOR
WATCHDOG
TIMER
UART
OSC
3 16-BIT
TIMER/COUNTERS
2-WIRE
SERIAL I/O
MUX
SPI
T1 (P3.5)
T2 (P1.0)
T2EX (P1.1)
INT0
(P3.2)
INT1
(P3.3)
ALE
PSEN
EA
RESET
V
REF
BUF
C
REF
ADuC812
256
8 USER
RAM
AV
DD
AGND
DV
DD
DGND
XTAL1 XTAL2 RxD TxD SCLOCK MOSI/ MISO
(P3.0) (P3.1)
SDATA (P3.3)
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
ADuC812
TABLE OF CONTENTS
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
APPLICATONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . 6
PIN CONFIGURATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . 7
TERMINOLOGY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
ADC SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Integral Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Differential Nonlinearity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Offset Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Full-Scale Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Signal to (Noise + Distortion) Ratio . . . . . . . . . . . . . . . . . . . . 8
Total Harmonic Distortion . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DAC SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Relative Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Voltage Output Settling Time . . . . . . . . . . . . . . . . . . . . . . . . . 8
Digital-to-Analog Glitch Impulse . . . . . . . . . . . . . . . . . . . . . . . 8
ARCHITECTURE, MAIN FEATURES . . . . . . . . . . . . . . . . . . 9
MEMORY ORGANIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OVERVIEW OF MCU-RELATED SFRs . . . . . . . . . . . . . . . . . 10
Accumulator SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
B SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Stack Pointer SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Data Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Program Status Word SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Power Control SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SPECIAL FUNCTION REGISTERS . . . . . . . . . . . . . . . . . . . 11
ADC CIRCUIT INFORMATION . . . . . . . . . . . . . . . . . . . . . . 12
General Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
ADC Transfer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Typical Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
ADCCON1—(ADC Control SFR #1) . . . . . . . . . . . . . . . . . 13
ADCCON2—(ADC Control SFR #2) . . . . . . . . . . . . . . . . . 14
ADCCON3—(ADC Control SFR #3) . . . . . . . . . . . . . . . . . 14
Driving the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Voltage Reference Connections . . . . . . . . . . . . . . . . . . . . . . . 16
Configuring the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
ADC DMA Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DMA Mode Configuration Example . . . . . . . . . . . . . . . . . . . 17
Micro Operation during ADC DMA Mode . . . . . . . . . . . . . . 17
Offset and Gain Calibration Coefficients . . . . . . . . . . . . . . . . 17
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
NONVOLATILE FLASH MEMORY . . . . . . . . . . . . . . . . . . . 18
Flash Memory Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Flash/EE Memory and the ADuC812 . . . . . . . . . . . . . . . . . . 18
ADuC812 Flash/EE Memory Reliability . . . . . . . . . . . . . . . . 18
Using the Flash/EE Program Memory . . . . . . . . . . . . . . . . . . 19
Using the Flash/EE Data Memory . . . . . . . . . . . . . . . . . . . . . 19
ECON—Flash/EE Memory Control SFR . . . . . . . . . . . . . . . 20
Flash/EE Memory Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Using the Flash/EE Memory Interface . . . . . . . . . . . . . . . . . . 20
Erase-All . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Program a Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
USER INTERFACE TO OTHER ON-CHIP
ADuC812 PERIPHERALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Using the DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
WATCHDOG TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
POWER SUPPLY MONITOR . . . . . . . . . . . . . . . . . . . . . . . . .
SERIAL PERIPHERAL INTERFACE . . . . . . . . . . . . . . . . . . .
MISO (Master In, Slave Out Data I/O Pin) . . . . . . . . . . . . . .
MOSI (Master Out, Slave In Pin) . . . . . . . . . . . . . . . . . . . . .
SCLOCK (Serial Clock I/O Pin) . . . . . . . . . . . . . . . . . . . . . .
SS
(Slave Select Input Pin) . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Interface—Master Mode . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Interface—Slave Mode . . . . . . . . . . . . . . . . . . . . . . . . . .
2
I C COMPATIBLE INTERFACE . . . . . . . . . . . . . . . . . . . . . .
8051 COMPATIBLE ON-CHIP PERIPHERALS . . . . . . . . . .
Parallel I/O Ports 0–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timers/Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer/Counters 0 and 1 Data Registers . . . . . . . . . . . . . . . . .
TH0 and TL0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TH1 and TL1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TIMER/COUNTERS 0 AND 1 OPERATING MODES . . . . .
Mode 0 (13-Bit Timer/Counter) . . . . . . . . . . . . . . . . . . . . . .
Mode 1 (16-Bit Timer/Counter) . . . . . . . . . . . . . . . . . . . . . .
Mode 2 (8-Bit Timer/Counter with Auto Reload) . . . . . . . . .
Mode 3 (Two 8-Bit Timer/Counters) . . . . . . . . . . . . . . . . . .
Timer/Counter 2 Data Registers . . . . . . . . . . . . . . . . . . . . . .
TH2 and TL2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RCAP2H and RCAP2L . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer/Counter Operation Modes . . . . . . . . . . . . . . . . . . . . .
16-Bit Autoreload Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Bit Capture Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UART SERIAL INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . .
Mode 0 (8-Bit Shift Register Mode) . . . . . . . . . . . . . . . . . . .
Mode 1 (8-Bit UART, Variable Baud Rate) . . . . . . . . . . . . . .
Mode 2 (9-Bit UART with Fixed Baud Rate) . . . . . . . . . . . .
Mode 3 (9-Bit UART with Variable Baud Rate) . . . . . . . . . .
UART Serial Port Baud Rate Generation . . . . . . . . . . . . . . .
Timer 1 Generated Baud Rates . . . . . . . . . . . . . . . . . . . . . . .
Timer 2 Generated Baud Rates . . . . . . . . . . . . . . . . . . . . . . .
INTERRUPT SYSTEM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ADuC812 HARDWARE DESIGN CONSIDERATIONS . . . .
Clock Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . .
Power-On Reset Operation . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Grounding and Board Layout Recommendations . . . . . . . . .
OTHER HARDWARE CONSIDERATIONS . . . . . . . . . . . . .
In-Circuit Serial Download Access . . . . . . . . . . . . . . . . . . . .
Embedded Serial Port Debugger . . . . . . . . . . . . . . . . . . . . . .
Single-Pin Emulation Mode . . . . . . . . . . . . . . . . . . . . . . . . . .
Enhanced-Hooks Emulation Mode . . . . . . . . . . . . . . . . . . . .
Typical System Configuration . . . . . . . . . . . . . . . . . . . . . . . .
QUICKSTART DEVELOPMENT SYSTEM . . . . . . . . . . . . .
Download—In-Circuit Serial Downloader . . . . . . . . . . . . . . .
DeBug—In-Circuit Debugger . . . . . . . . . . . . . . . . . . . . . . . .
ADSIM—Windows Simulator . . . . . . . . . . . . . . . . . . . . . . . .
TIMING SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . .
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
24
25
25
26
26
26
27
27
27
28
29
29
29
31
31
31
32
32
32
32
32
33
33
33
34
34
34
35
36
36
36
36
36
37
37
38
39
39
40
40
40
41
41
42
43
44
44
44
45
45
45
45
45
45
45
46
56
57
–2–
REV. E
3.0 V
SPECIFICATIONS
R = 2 k = ,DV ==100 pF. or 5.0 V 10%, REF T/REF T =,2.5 V Internal Reference, MCLKIN = 11.0592 MHz,
f
= 200 kHz, DAC V Load to AGND;
C
All specifications T =
to
unless otherwise noted.)
DD
DD
IN
OUT
SAMPLE
OUT
L
L
A
MIN
MAX
1, 2
(AV
ADuC812
Parameter
ADC CHANNEL SPECIFICATIONS
DC ACCURACY
3, 4
Resolution
Integral Nonlinearity
ADuC812BS
V
DD
= 5 V
V
DD
= 3 V
Unit
Test Conditions/Comments
Differential Nonlinearity
CALIBRATED ENDPOINT ERRORS
5, 6
Offset Error
Offset Error Match
Gain Error
Gain Error Match
USER SYSTEM CALIBRATION
7
Offset Calibration Range
Gain Calibration Range
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio (SNR)
8
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
ANALOG INPUT
Input Voltage Ranges
Leakage Current
Input Capacitance
9
TEMPERATURE SENSOR
10
Voltage Output at 25°C
Voltage TC
DAC CHANNEL SPECIFICATIONS
DC ACCURACY
11
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Full-Scale Error
Full-Scale Mismatch
ANALOG OUTPUTS
Voltage Range_0
Voltage Range_1
Resistive Load
Capacitive Load
Output Impedance
I
SINK
12
±1/2
±1.5
±1.5
±1
12
±1/2
±1.5
±1.5
±1
Bits
LSB typ
LSB max
LSB typ
LSB typ
f
SAMPLE
= 100 kHz
f
SAMPLE
= 100 kHz
f
SAMPLE
= 200 kHz
f
SAMPLE
= 100 kHz. Guaranteed No
Missing Codes at 5 V
±5
±1
1
±6
±1
1.5
±5
±2.5
±5
±1
1
±6
±1
1.5
±5
±2.5
LSB max
LSB typ
LSB typ
LSB max
LSB typ
LSB typ
% of V
REF
typ
% of V
REF
typ
f
IN
= 10 kHz Sine Wave
f
SAMPLE
= 100 kHz
70
–78
–78
0 to V
REF
±1
±0.1
20
600
–3.0
70
–78
–78
0 to V
REF
±1
±0.1
20
600
–3.0
dB typ
dB typ
dB typ
V
µA max
µA typ
pF max
mV typ
mV/°C typ
Can vary significantly (> ±20%)
from device to device
12
±3
±0.5
±60
±15
±30
±10
±0.5
0 to V
REF
0 to V
DD
10
100
0.5
50
12
±3
±1
±60
±15
±30
±10
±0.5
0 to V
REF
0 to V
DD
10
100
0.5
50
Bits
LSB typ
LSB typ
mV max
mV typ
mV max
mV typ
% typ
V typ
V typ
kΩ typ
pF typ
Ω
typ
µA typ
Guaranteed 12-Bit Monotonic
% of Full-Scale on DAC1
REV. E
–3–
ADuC812
SPECIFICATIONS
1, 2
(continued)
Parameter
DAC AC CHARACTERISTICS
Voltage Output Settling Time
Digital-to-Analog Glitch Energy
REFERENCE INPUT/OUTPUT
REF
IN
Input Voltage Range
9
Input Impedance
REF
OUT
Output Voltage
REF
OUT
Tempco
FLASH/EE MEMORY PERFORMANCE
CHARACTERISTICS
12, 13
Endurance
Data Retention
WATCHDOG TIMER
CHARACTERISTICS
Oscillator Frequency
POWER SUPPLY MONITOR
CHARACTERISTICS
Power Supply Trip Point Accuracy
ADuC812BS
V
DD
= 5 V
V
DD
= 3 V
15
10
2.3/V
DD
150
2.5 ± 2.5%
2.5
100
15
10
2.3/V
DD
150
2.5 ± 2.5%
2.5
100
Unit
µs typ
nV sec typ
V min/max
kΩ typ
V min/max
V typ
ppm/°C typ
Test Conditions/Comments
Full-Scale Settling Time to
within 1/2 LSB of Final Value
1 LSB Change at Major Carry
Initial Tolerance @ 25°C
10,000
50,000
10
50,000
Cycles min
Cycles typ
Years min
64
64
kHz typ
±2.5
±2.5
±1.0
±1.0
% of Selected
Nominal Trip
Point Voltage
max
% of Selected
Nominal Trip
Point Voltage
typ
V min
V min
V max
µA max
µA typ
µA max
µA typ
µA max
µA typ
µA max
µA typ
pF typ
DIGITAL INPUTS
Input High Voltage (V
INH
)
XTAL1 Input High Voltage (V
INH
) Only
Input Low Voltage (V
INL
)
Input Leakage Current (Port 0,
EA)
Logic 1 Input Current
(All Digital Inputs)
2.4
4
0.8
±10
±1
2.4
0.8
±10
±1
±10
±1
–40
–20
–500
–200
10
V
IN
= 0 V or V
DD
V
IN
= 0 V or V
DD
V
IN
= V
DD
V
IN
= V
DD
V
IL
= 450 mV
V
IL
= 2 V
V
IL
= 2 V
±10
±1
Logic 0 Input Current (Port 1, 2, 3)
–80
–40
Logic 1-0 Transition Current (Port 1, 2, 3) –700
–400
Input Capacitance
10
–4–
REV. E
