Changes to Table 5 .......................................................................... 10
6/2004—Rev. 0 to Rev. A
Changes to Format ............................................................. Universal
Changes to General Description ..................................................... 1
Changes to Electrical Characteristics—5 V Operation................ 3
Changes to Electrical Characteristics—3 V Operation................ 5
Changes to Electrical Characteristics—Mixed 5 V/3 V or
3 V/5 V Operation ............................................................................ 7
4/2004—Revision 0: Initial Version
Rev. K | Page 3 of 28
ADuM1200/ADuM1201
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V, 105°C OPERATION
Data Sheet
All voltages are relative to the respective ground; 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V; this
does not apply to the
ADuM1200W
and
ADuM1201W
automotive grade products.
Table 1.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1200
Total Supply Current, Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BR and CR Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
25 Mbps (CR Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
ADuM1201
Total Supply Current, Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current
V
DD2
Supply Current
10 Mbps (BR and CR Grades Only)
V
DD1
Supply Current
V
DD2
Supply Current
25 Mbps (CR Grade Only)
V
DD1
Supply Current
V
DD2
Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Symbol
I
DDI (Q)
I
DDO (Q)
Min
Typ
0.50
0.19
Max
0.60
0.25
Unit
mA
mA
Test Conditions/Comments
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (25)
I
DD2 (25)
1.1
0.5
4.3
1.3
10
2.8
1.4
0.8
5.5
2.0
13
3.4
mA
mA
mA
mA
mA
mA
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (10)
I
DD2 (10)
I
DD1 (25)
I
DD2 (25)
I
IA
, I
IB
V
IH
V
IL
V
OAH
, V
OBH
V
OAL
, V
OBL
−10
0.7 (V
DD1
or V
DD2
)
(V
DD1
or V
DD2
) − 0.1
(V
DD1
or V
DD2
) − 0.5
0.8
0.8
2.8
2.8
6.3
6.3
+0.01
1.1
1.1
3.5
3.5
8.0
8.0
+10
0.3 (V
DD1
or V
DD2
)
mA
mA
mA
mA
mA
mA
µA
V
V
V
V
V
V
V
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
0 V ≤ V
IA
, V
IB
≤ (V
DD1
or V
DD2
)
5.0
4.8
0.0
0.04
0.2
0.1
0.1
0.4
I
Ox
= −20 µA, V
Ix
= V
IxH
I
Ox
= −4 mA, V
Ix
= V
IxH
I
Ox
= 20 µA, V
Ix
= V
IxL
I
Ox
= 400 µA, V
Ix
= V
IxL
I
Ox
= 4 mA, V
Ix
= V
IxL
C
L
= 15 pF, CMOS signal levels
SWITCHING SPECIFICATIONS
ADuM1200/ADuM1201AR
Minimum Pulse Width
2
Maximum Data Rate
3
Propagation Delay
4
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
Change vs. Temperature
Propagation Delay Skew
5
Channel-to-Channel Matching
6
Output Rise/Fall Time (10% to 90%)
PW
t
PHL
, t
PLH
PWD
t
PSK
t
PSKCD
/t
PSKOD
t
R
/t
F
1
50
11
1000
150
40
100
50
10
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
Rev. K | Page 4 of 28
Data Sheet
Parameter
ADuM1200/ADuM1201BR
Minimum Pulse Width
2
Maximum Data Rate
Propagation Delay
4
3
ADuM1200/ADuM1201
Symbol
PW
10
t
PHL
, t
PLH
PWD
5
t
PSK
t
PSKCD
t
PSKOD
t
R
/t
F
PW
25
t
PHL
, t
PLH
PWD
5
t
PSK
t
PSKCD
t
PSKOD
t
R
/t
F
2.5
15
ns
ns
15
3
20
2.5
20
50
45
3
40
15
15
3
ns
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
20
50
3
Min
Typ
Max
100
Unit
ns
Mbps
ns
ns
ps/°C
ns
Test Conditions/Comments
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
Change vs. Temperature
Propagation Delay Skew
5
Channel-to-Channel Matching
Codirectional Channels
6
Opposing Directional Channels
Output Rise/Fall Time (10% to 90%)
ADuM1200/ADuM1201CR
Minimum Pulse Width
2
Maximum Data Rate
Propagation Delay
4
3
6
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
Change vs. Temperature
Propagation Delay Skew
5
Channel-to-Channel Matching
Codirectional Channels
6
Opposing Directional Channels
Output Rise/Fall Time (10% to 90%)
For All Models
Common-Mode Transient Immunity
Logic High Output
7
6
|CM
H
|
|CM
L
|
f
r
I
DDI (D)
I
DDO (D)
25
25
35
35
1.2
0.19
0.05
kV/µs
kV/µs
Mbps
mA/
Mbps
mA/
Mbps
Logic Low Output
7
Refresh Rate
Dynamic Supply Current per Channel
8
Input
Output
1
V
Ix
= V
DD1
or V
DD2
, V
CM
=
1000 V, transient
magnitude = 800 V
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load
present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 6 through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See Figure 9 through Figure 11
for total V
DD1
and V
DD2
supply currents as a function of data rate for
ADuM1200
and
ADuM1201
channel configurations.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
t
PSK
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
O
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate
that can be sustained while maintaining V
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate. See Figure 6 through Figure 8 for
information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See the Power Consumption section for guidance on
calculating per-channel supply current for a given data rate.
